diff mbox

[4/5] forcedeth: recover error support

Message ID 498C8F1F.2060005@nvidia.com
State Accepted, archived
Delegated to: David Miller
Headers show

Commit Message

Ayaz Abdulla Feb. 6, 2009, 7:27 p.m. UTC 
This patch adds another type of recoverable error to the driver. It also
modifies the sequence for recovery to include a mac reset and clearing
of interrupts.

Signed-off-by: Ayaz Abdulla <aabdulla@nvidia.com>

Comments

David Miller Feb. 7, 2009, 8:26 a.m. UTC | #1 
From: Ayaz Abdulla <aabdulla@nvidia.com>
Date: Fri, 06 Feb 2009 14:27:27 -0500

> This patch adds another type of recoverable error to the driver. It also
> modifies the sequence for recovery to include a mac reset and clearing
> of interrupts.
> 
> Signed-off-by: Ayaz Abdulla <aabdulla@nvidia.com>

Applied to net-next-2.6
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diff mbox

Patch

--- old/drivers/net/forcedeth.c	2009-02-06 14:16:30.000000000 -0500
+++ new/drivers/net/forcedeth.c	2009-02-06 14:16:47.000000000 -0500
@@ -102,7 +102,7 @@ 
 enum {
 	NvRegIrqStatus = 0x000,
 #define NVREG_IRQSTAT_MIIEVENT	0x040
-#define NVREG_IRQSTAT_MASK		0x81ff
+#define NVREG_IRQSTAT_MASK		0x83ff
 	NvRegIrqMask = 0x004,
 #define NVREG_IRQ_RX_ERROR		0x0001
 #define NVREG_IRQ_RX			0x0002
@@ -113,7 +113,7 @@ 
 #define NVREG_IRQ_LINK			0x0040
 #define NVREG_IRQ_RX_FORCED		0x0080
 #define NVREG_IRQ_TX_FORCED		0x0100
-#define NVREG_IRQ_RECOVER_ERROR		0x8000
+#define NVREG_IRQ_RECOVER_ERROR		0x8200
 #define NVREG_IRQMASK_THROUGHPUT	0x00df
 #define NVREG_IRQMASK_CPU		0x0060
 #define NVREG_IRQ_TX_ALL		(NVREG_IRQ_TX_ERR|NVREG_IRQ_TX_OK|NVREG_IRQ_TX_FORCED)
@@ -4073,13 +4073,15 @@ 
 
 	if (np->recover_error) {
 		np->recover_error = 0;
-		printk(KERN_INFO "forcedeth: MAC in recoverable error state\n");
+		printk(KERN_INFO "%s: MAC in recoverable error state\n", dev->name);
 		if (netif_running(dev)) {
 			netif_tx_lock_bh(dev);
 			netif_addr_lock(dev);
 			spin_lock(&np->lock);
 			/* stop engines */
 			nv_stop_rxtx(dev);
+			if (np->driver_data & DEV_HAS_POWER_CNTRL)
+				nv_mac_reset(dev);
 			nv_txrx_reset(dev);
 			/* drain rx queue */
 			nv_drain_rxtx(dev);
@@ -4097,6 +4099,11 @@ 
 			pci_push(base);
 			writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
 			pci_push(base);
+			/* clear interrupts */
+			if (!(np->msi_flags & NV_MSI_X_ENABLED))
+				writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus);
+			else
+				writel(NVREG_IRQSTAT_MASK, base + NvRegMSIXIrqStatus);
 
 			/* restart rx engine */
 			nv_start_rxtx(dev);