From patchwork Wed Dec 2 13:53:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Parav Pandit X-Patchwork-Id: 1409748 Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.a=rsa-sha256 header.s=n1 header.b=NEtqRG4Q; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4CmL7w0Msvz9s1l for ; Thu, 3 Dec 2020 00:55:08 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727407AbgLBNyu (ORCPT ); Wed, 2 Dec 2020 08:54:50 -0500 Received: from hqnvemgate25.nvidia.com ([216.228.121.64]:6658 "EHLO hqnvemgate25.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726289AbgLBNyu (ORCPT ); Wed, 2 Dec 2020 08:54:50 -0500 Received: from hqmail.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate25.nvidia.com (using TLS: TLSv1.2, AES256-SHA) id ; Wed, 02 Dec 2020 05:54:10 -0800 Received: from sw-mtx-036.mtx.labs.mlnx (172.20.13.39) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Wed, 2 Dec 2020 13:54:08 +0000 From: Parav Pandit To: , , CC: , Parav Pandit , Jiri Pirko Subject: [PATCH net-next v3] devlink: Add devlink port documentation Date: Wed, 2 Dec 2020 15:53:37 +0200 Message-ID: <20201202135337.937538-1-parav@nvidia.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201130164119.571362-1-parav@nvidia.com> References: <20201130164119.571362-1-parav@nvidia.com> MIME-Version: 1.0 X-Originating-IP: [172.20.13.39] X-ClientProxiedBy: HQMAIL107.nvidia.com (172.20.187.13) To HQMAIL107.nvidia.com (172.20.187.13) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1606917250; bh=mH4/woGc7xUG6NfGQD0lcSoKQbNcb4QIknP10bICu+A=; h=From:To:CC:Subject:Date:Message-ID:X-Mailer:In-Reply-To: References:MIME-Version:Content-Transfer-Encoding:Content-Type: X-Originating-IP:X-ClientProxiedBy; b=NEtqRG4QPhuhl8oZ3PwWnwSahAE8s5rtsQgxWFWPUi7HURP3itd5WeZs+ordLlJVy XK4fWcJKlP03eHS/F09vJeaZ1Lh3x+e0zViGC/yYetu7o8gwOa51/pZioguJ52C3G/ y6rsM31WkSKaEmZZXh1jZQi+2d5dORt6HBUggH31A+H2DYNaHFyiGxWQCnGPcboAFz ah+RiuMHgzjZX6ubcJav/BURzJFZWjXwBiVloBsFfuKYZS2zu+kd+k6Eb+Z1FV2hNV 7UEmjvYCWFcTrm8xPs6afUZwjD43V5ccng226I/tDUpy+MfhBKIuRzCqcr05YFeBk1 IHbG2+4aK74bg== Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Added documentation for devlink port and port function related commands. Signed-off-by: Parav Pandit Reviewed-by: Jiri Pirko Reviewed-by: Jacob Keller --- Changelog: v2->v3: - rephased many lines - first paragraph now describe devlink port - instead of saying PCI device/function, using PCI function every where - changed 'physical link layer' to 'link layer' - made devlink port type description more clear - made devlink port flavour description more clear - moved devlink port type table after port flavour - added description for the example diagram - describe CPU port that its linked to DSA - made devlink port description for eswitch port more clear v1->v2: - Removed duplicate table entries for DEVLINK_PORT_FLAVOUR_VIRTUAL. - replaced 'consist of' to 'consisting' - changed 'can be' to 'can be of' --- .../networking/devlink/devlink-port.rst | 111 ++++++++++++++++++ Documentation/networking/devlink/index.rst | 1 + 2 files changed, 112 insertions(+) create mode 100644 Documentation/networking/devlink/devlink-port.rst diff --git a/Documentation/networking/devlink/devlink-port.rst b/Documentation/networking/devlink/devlink-port.rst new file mode 100644 index 000000000000..8407bbe9ce88 --- /dev/null +++ b/Documentation/networking/devlink/devlink-port.rst @@ -0,0 +1,111 @@ +.. SPDX-License-Identifier: GPL-2.0 + +============ +Devlink Port +============ + +``devlink-port`` is a port that exist on the device. A devlink port can +be of one among many flavours. A devlink port flavour along with port +attributes describe what a port represents. + +A device driver who intents to publish a devlink port, sets the +devlink port attributes and registers the devlink port. + +Devlink port flavours are described below. + +.. list-table:: List of devlink port flavours + :widths: 33 90 + + * - Flavour + - Description + * - ``DEVLINK_PORT_FLAVOUR_PHYSICAL`` + - Any kind of physical networking port. This can be a eswitch physical + port or any other physical port on the device. + * - ``DEVLINK_PORT_FLAVOUR_DSA`` + - This indicates a DSA interconnect port. + * - ``DEVLINK_PORT_FLAVOUR_CPU`` + - This indicates a CPU port applicable only to DSA. + * - ``DEVLINK_PORT_FLAVOUR_PCI_PF`` + - This indicates an eswitch port representing a networking port of + PCI physical function (PF). + * - ``DEVLINK_PORT_FLAVOUR_PCI_VF`` + - This indicates an eswitch port representing a networking port of + PCI virtual function (VF). + * - ``DEVLINK_PORT_FLAVOUR_VIRTUAL`` + - This indicates a virtual port for the virtual PCI device such as PCI VF. + +A devlink port types are described below. + +.. list-table:: List of devlink port types + :widths: 23 90 + + * - Type + - Description + * - ``DEVLINK_PORT_TYPE_ETH`` + - Driver should set this port type when a link layer of the port is Ethernet. + * - ``DEVLINK_PORT_TYPE_IB`` + - Driver should set this port type when a link layer of the port is InfiniBand. + * - ``DEVLINK_PORT_TYPE_AUTO`` + - This type is indicated by the user when user prefers to set the port type + to be automatically detected by the device driver. + +A controller consist of one or more PCI functions. Such PCI function can have one +or more networking ports. A networking port of such PCI function is represented +by the eswitch devlink port. A devlink instance holds ports of two types of +controllers. + +(1) controller discovered on same system where eswitch resides: +This is the case where PCI PF/VF of a controller and devlink eswitch +instance both are located on a single system. + +(2) controller located on external host system. +This is the case where a controller is located in one system and its +devlink eswitch ports are located in a different system. Such controller +is called external controller. + +An example view of two controller systems:: + +In this example a controller which contains the eswitch is local controller +with controller number = 0. The second is a external controller having +controller number = 1. Eswitch devlink instance has representor devlink +ports for the PCI functions of both the controllers. + + --------------------------------------------------------- + | | + | --------- --------- ------- ------- | + ----------- | | vf(s) | | sf(s) | |vf(s)| |sf(s)| | + | server | | ------- ----/---- ---/----- ------- ---/--- ---/--- | + | pci rc |=== | pf0 |______/________/ | pf1 |___/_______/ | + | connect | | ------- ------- | + ----------- | | controller_num=1 (no eswitch) | + ------|-------------------------------------------------- + (internal wire) + | + --------------------------------------------------------- + | devlink eswitch ports and reps | + | ----------------------------------------------------- | + | |ctrl-0 | ctrl-0 | ctrl-0 | ctrl-0 | ctrl-0 |ctrl-0 | | + | |pf0 | pf0vfN | pf0sfN | pf1 | pf1vfN |pf1sfN | | + | ----------------------------------------------------- | + | |ctrl-1 | ctrl-1 | ctrl-1 | ctrl-1 | ctrl-1 |ctrl-1 | | + | |pf0 | pf0vfN | pf0sfN | pf1 | pf1vfN |pf1sfN | | + | ----------------------------------------------------- | + | | + | | + | --------- --------- ------- ------- | + | | vf(s) | | sf(s) | |vf(s)| |sf(s)| | + | ------- ----/---- ---/----- ------- ---/--- ---/--- | + | | pf0 |______/________/ | pf1 |___/_______/ | + | ------- ------- | + | | + | local controller_num=0 (eswitch) | + --------------------------------------------------------- + +Port function configuration +=========================== + +When a port flavor is ``DEVLINK_PORT_FLAVOUR_PCI_PF`` or +``DEVLINK_PORT_FLAVOUR_PCI_VF``, it represents the networking port of a +PCI function. A user can configure the port function attributes before +enumerating the function. For example user may set the hardware address of +the function represented by the devlink port function. diff --git a/Documentation/networking/devlink/index.rst b/Documentation/networking/devlink/index.rst index d82874760ae2..aab79667f97b 100644 --- a/Documentation/networking/devlink/index.rst +++ b/Documentation/networking/devlink/index.rst @@ -18,6 +18,7 @@ general. devlink-info devlink-flash devlink-params + devlink-port devlink-region devlink-resource devlink-reload