| Message ID | 20201115165757.552641-1-martin.blumenstingl@googlemail.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [v2] net: lantiq: Wait for the GPHY firmware to be ready | expand |
On 11/15/20 5:57 PM, Martin Blumenstingl wrote: > A user reports (slightly shortened from the original message): > libphy: lantiq,xrx200-mdio: probed > mdio_bus 1e108000.switch-mii: MDIO device at address 17 is missing. > gswip 1e108000.switch lan: no phy at 2 > gswip 1e108000.switch lan: failed to connect to port 2: -19 > lantiq,xrx200-net 1e10b308.eth eth0: error -19 setting up slave phy > > This is a single-port board using the internal Fast Ethernet PHY. The > user reports that switching to PHY scanning instead of configuring the > PHY within device-tree works around this issue. > > The documentation for the standalone variant of the PHY11G (which is > probably very similar to what is used inside the xRX200 SoCs but having > the firmware burnt onto that standalone chip in the factory) states that > the PHY needs 300ms to be ready for MDIO communication after releasing > the reset. > > Add a 300ms delay after initializing all GPHYs to ensure that the GPHY > firmware had enough time to initialize and to appear on the MDIO bus. > Unfortunately there is no (known) documentation on what the minimum time > to wait after releasing the reset on an internal PHY so play safe and > take the one for the external variant. Only wait after the last GPHY > firmware is loaded to not slow down the initialization too much ( > xRX200 has two GPHYs but newer SoCs have at least three GPHYs). > > Fixes: 14fceff4771e51 ("net: dsa: Add Lantiq / Intel DSA driver for vrx200") > Reviewed-by: Andrew Lunn <andrew@lunn.ch> > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Hauke Mehrtens <hauke@hauke-m.de> > --- > Changes since v1: > - move the msleep() closer to the actual loop over all GPHY instances > as suggested by Andrew > - added Andrew's Reviewed-by (thank you!) > > > drivers/net/dsa/lantiq_gswip.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/drivers/net/dsa/lantiq_gswip.c b/drivers/net/dsa/lantiq_gswip.c > index 74db81dafee3..09701c17f3f6 100644 > --- a/drivers/net/dsa/lantiq_gswip.c > +++ b/drivers/net/dsa/lantiq_gswip.c > @@ -26,6 +26,7 @@ > */ > > #include <linux/clk.h> > +#include <linux/delay.h> > #include <linux/etherdevice.h> > #include <linux/firmware.h> > #include <linux/if_bridge.h> > @@ -1837,6 +1838,16 @@ static int gswip_gphy_fw_list(struct gswip_priv *priv, > i++; > } > > + /* The standalone PHY11G requires 300ms to be fully > + * initialized and ready for any MDIO communication after being > + * taken out of reset. For the SoC-internal GPHY variant there > + * is no (known) documentation for the minimum time after a > + * reset. Use the same value as for the standalone variant as > + * some users have reported internal PHYs not being detected > + * without any delay. > + */ > + msleep(300); > + > return 0; > > remove_gphy: >
On 11/15/2020 8:57 AM, Martin Blumenstingl wrote: > A user reports (slightly shortened from the original message): > libphy: lantiq,xrx200-mdio: probed > mdio_bus 1e108000.switch-mii: MDIO device at address 17 is missing. > gswip 1e108000.switch lan: no phy at 2 > gswip 1e108000.switch lan: failed to connect to port 2: -19 > lantiq,xrx200-net 1e10b308.eth eth0: error -19 setting up slave phy > > This is a single-port board using the internal Fast Ethernet PHY. The > user reports that switching to PHY scanning instead of configuring the > PHY within device-tree works around this issue. > > The documentation for the standalone variant of the PHY11G (which is > probably very similar to what is used inside the xRX200 SoCs but having > the firmware burnt onto that standalone chip in the factory) states that > the PHY needs 300ms to be ready for MDIO communication after releasing > the reset. > > Add a 300ms delay after initializing all GPHYs to ensure that the GPHY > firmware had enough time to initialize and to appear on the MDIO bus. > Unfortunately there is no (known) documentation on what the minimum time > to wait after releasing the reset on an internal PHY so play safe and > take the one for the external variant. Only wait after the last GPHY > firmware is loaded to not slow down the initialization too much ( > xRX200 has two GPHYs but newer SoCs have at least three GPHYs). > > Fixes: 14fceff4771e51 ("net: dsa: Add Lantiq / Intel DSA driver for vrx200") > Reviewed-by: Andrew Lunn <andrew@lunn.ch> > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
On Sun, Nov 15, 2020 at 05:57:57PM +0100, Martin Blumenstingl wrote: > A user reports (slightly shortened from the original message): > libphy: lantiq,xrx200-mdio: probed > mdio_bus 1e108000.switch-mii: MDIO device at address 17 is missing. > gswip 1e108000.switch lan: no phy at 2 > gswip 1e108000.switch lan: failed to connect to port 2: -19 > lantiq,xrx200-net 1e10b308.eth eth0: error -19 setting up slave phy > > This is a single-port board using the internal Fast Ethernet PHY. The > user reports that switching to PHY scanning instead of configuring the > PHY within device-tree works around this issue. > > The documentation for the standalone variant of the PHY11G (which is > probably very similar to what is used inside the xRX200 SoCs but having > the firmware burnt onto that standalone chip in the factory) states that > the PHY needs 300ms to be ready for MDIO communication after releasing > the reset. > > Add a 300ms delay after initializing all GPHYs to ensure that the GPHY > firmware had enough time to initialize and to appear on the MDIO bus. > Unfortunately there is no (known) documentation on what the minimum time > to wait after releasing the reset on an internal PHY so play safe and > take the one for the external variant. Only wait after the last GPHY > firmware is loaded to not slow down the initialization too much ( > xRX200 has two GPHYs but newer SoCs have at least three GPHYs). > > Fixes: 14fceff4771e51 ("net: dsa: Add Lantiq / Intel DSA driver for vrx200") > Reviewed-by: Andrew Lunn <andrew@lunn.ch> > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Andrew
Hello: This patch was applied to netdev/net.git (refs/heads/master): On Sun, 15 Nov 2020 17:57:57 +0100 you wrote: > A user reports (slightly shortened from the original message): > libphy: lantiq,xrx200-mdio: probed > mdio_bus 1e108000.switch-mii: MDIO device at address 17 is missing. > gswip 1e108000.switch lan: no phy at 2 > gswip 1e108000.switch lan: failed to connect to port 2: -19 > lantiq,xrx200-net 1e10b308.eth eth0: error -19 setting up slave phy > > [...] Here is the summary with links: - [v2] net: lantiq: Wait for the GPHY firmware to be ready https://git.kernel.org/netdev/net/c/2a1828e378c1 You are awesome, thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/patchwork/pwbot.html
diff --git a/drivers/net/dsa/lantiq_gswip.c b/drivers/net/dsa/lantiq_gswip.c index 74db81dafee3..09701c17f3f6 100644 --- a/drivers/net/dsa/lantiq_gswip.c +++ b/drivers/net/dsa/lantiq_gswip.c @@ -26,6 +26,7 @@ */ #include <linux/clk.h> +#include <linux/delay.h> #include <linux/etherdevice.h> #include <linux/firmware.h> #include <linux/if_bridge.h> @@ -1837,6 +1838,16 @@ static int gswip_gphy_fw_list(struct gswip_priv *priv, i++; } + /* The standalone PHY11G requires 300ms to be fully + * initialized and ready for any MDIO communication after being + * taken out of reset. For the SoC-internal GPHY variant there + * is no (known) documentation for the minimum time after a + * reset. Use the same value as for the standalone variant as + * some users have reported internal PHYs not being detected + * without any delay. + */ + msleep(300); + return 0; remove_gphy:
A user reports (slightly shortened from the original message): libphy: lantiq,xrx200-mdio: probed mdio_bus 1e108000.switch-mii: MDIO device at address 17 is missing. gswip 1e108000.switch lan: no phy at 2 gswip 1e108000.switch lan: failed to connect to port 2: -19 lantiq,xrx200-net 1e10b308.eth eth0: error -19 setting up slave phy This is a single-port board using the internal Fast Ethernet PHY. The user reports that switching to PHY scanning instead of configuring the PHY within device-tree works around this issue. The documentation for the standalone variant of the PHY11G (which is probably very similar to what is used inside the xRX200 SoCs but having the firmware burnt onto that standalone chip in the factory) states that the PHY needs 300ms to be ready for MDIO communication after releasing the reset. Add a 300ms delay after initializing all GPHYs to ensure that the GPHY firmware had enough time to initialize and to appear on the MDIO bus. Unfortunately there is no (known) documentation on what the minimum time to wait after releasing the reset on an internal PHY so play safe and take the one for the external variant. Only wait after the last GPHY firmware is loaded to not slow down the initialization too much ( xRX200 has two GPHYs but newer SoCs have at least three GPHYs). Fixes: 14fceff4771e51 ("net: dsa: Add Lantiq / Intel DSA driver for vrx200") Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> --- Changes since v1: - move the msleep() closer to the actual loop over all GPHY instances as suggested by Andrew - added Andrew's Reviewed-by (thank you!) drivers/net/dsa/lantiq_gswip.c | 11 +++++++++++ 1 file changed, 11 insertions(+)