| Message ID | 20200508154343.6074-3-m.grzeschik@pengutronix.de |
|---|---|
| State | Changes Requested |
| Delegated to: | David Miller |
| Headers | show |
| Series | microchip: add support for ksz88x3 driver family | expand |
On Fri, May 08, 2020 at 05:43:40PM +0200, Michael Grzeschik wrote: > Microchip SMI0 Mode is a special mode, where the MDIO Read/Write > commands are part of the PHY Address and the OP Code is always 0. We add > the compatible for this special mode of the bitbanged mdio driver. > > Cc: devicetree@vger.kernel.org > Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Andrew
On 5/8/2020 8:43 AM, Michael Grzeschik wrote: > Microchip SMI0 Mode is a special mode, where the MDIO Read/Write > commands are part of the PHY Address and the OP Code is always 0. We add > the compatible for this special mode of the bitbanged mdio driver. > > Cc: devicetree@vger.kernel.org > Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
On Fri, 8 May 2020 17:43:40 +0200, Michael Grzeschik wrote: > Microchip SMI0 Mode is a special mode, where the MDIO Read/Write > commands are part of the PHY Address and the OP Code is always 0. We add > the compatible for this special mode of the bitbanged mdio driver. > > Cc: devicetree@vger.kernel.org > Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> > --- > Documentation/devicetree/bindings/net/mdio-gpio.txt | 1 + > 1 file changed, 1 insertion(+) > Acked-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/net/mdio-gpio.txt b/Documentation/devicetree/bindings/net/mdio-gpio.txt index 8dbcf8295c6c9c..4d91a36c5cf503 100644 --- a/Documentation/devicetree/bindings/net/mdio-gpio.txt +++ b/Documentation/devicetree/bindings/net/mdio-gpio.txt @@ -2,6 +2,7 @@ MDIO on GPIOs Currently defined compatibles: - virtual,gpio-mdio +- microchip,mdio-smi0 MDC and MDIO lines connected to GPIO controllers are listed in the gpios property as described in section VIII.1 in the following order:
Microchip SMI0 Mode is a special mode, where the MDIO Read/Write commands are part of the PHY Address and the OP Code is always 0. We add the compatible for this special mode of the bitbanged mdio driver. Cc: devicetree@vger.kernel.org Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> --- Documentation/devicetree/bindings/net/mdio-gpio.txt | 1 + 1 file changed, 1 insertion(+)