| Message ID | 20200415123447.29769-1-o.rempel@pengutronix.de |
|---|---|
| State | Changes Requested |
| Delegated to: | David Miller |
| Headers | show |
| Series | [v1] net: phy: tja11xx: add support for master-slave configuration | expand |
This is the followup patch to the: ethtool: provide UAPI for PHY master/slave configuration. On Wed, Apr 15, 2020 at 02:34:47PM +0200, Oleksij Rempel wrote: > The TJA11xx PHYs have a vendor specific Master/Slave configuration bit, > which is not compatible with IEEE 803.2-2018 spec for 100Base-T1 > devices. So, provide a custom config_ange call back to solve this > problem. > > Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> > --- > drivers/net/phy/nxp-tja11xx.c | 39 +++++++++++++++++++++++++++++++++++ > 1 file changed, 39 insertions(+) > > diff --git a/drivers/net/phy/nxp-tja11xx.c b/drivers/net/phy/nxp-tja11xx.c > index 2bde9386baf1f..0042ee453cbd4 100644 > --- a/drivers/net/phy/nxp-tja11xx.c > +++ b/drivers/net/phy/nxp-tja11xx.c > @@ -30,6 +30,7 @@ > #define MII_ECTRL_WAKE_REQUEST BIT(0) > > #define MII_CFG1 18 > +#define MII_CFG1_MASTER_SLAVE BIT(15) > #define MII_CFG1_AUTO_OP BIT(14) > #define MII_CFG1_SLEEP_CONFIRM BIT(6) > #define MII_CFG1_LED_MODE_MASK GENMASK(5, 4) > @@ -177,6 +178,31 @@ static int tja11xx_soft_reset(struct phy_device *phydev) > return genphy_soft_reset(phydev); > } > > +static int tja11xx_config_aneg(struct phy_device *phydev) > +{ > + u16 ctl = 0; > + int ret; > + > + switch (phydev->master_slave) { > + case PORT_MODE_MASTER: > + ctl |= MII_CFG1_MASTER_SLAVE; > + break; > + case PORT_MODE_SLAVE: > + break; > + case PORT_MODE_UNKNOWN: > + return 0; > + default: > + phydev_warn(phydev, "Unsupported Master/Slave mode\n"); > + return -ENOTSUPP; > + } > + > + ret = phy_modify_changed(phydev, MII_CFG1, MII_CFG1_MASTER_SLAVE, ctl); > + if (ret < 0) > + return ret; > + > + return __genphy_config_aneg(phydev, ret); > +} > + > static int tja11xx_config_init(struct phy_device *phydev) > { > int ret; > @@ -245,6 +271,15 @@ static int tja11xx_read_status(struct phy_device *phydev) > > if (!(ret & MII_COMMSTAT_LINK_UP)) > phydev->link = 0; > + > + ret = phy_read(phydev, MII_CFG1); > + if (ret < 0) > + return ret; > + > + if (ret & MII_CFG1_MASTER_SLAVE) > + phydev->master_slave = PORT_MODE_MASTER; > + else > + phydev->master_slave = PORT_MODE_SLAVE; > } > > return 0; > @@ -514,6 +549,7 @@ static struct phy_driver tja11xx_driver[] = { > .features = PHY_BASIC_T1_FEATURES, > .probe = tja11xx_probe, > .soft_reset = tja11xx_soft_reset, > + .config_aneg = tja11xx_config_aneg, > .config_init = tja11xx_config_init, > .read_status = tja11xx_read_status, > .suspend = genphy_suspend, > @@ -529,6 +565,7 @@ static struct phy_driver tja11xx_driver[] = { > .features = PHY_BASIC_T1_FEATURES, > .probe = tja11xx_probe, > .soft_reset = tja11xx_soft_reset, > + .config_aneg = tja11xx_config_aneg, > .config_init = tja11xx_config_init, > .read_status = tja11xx_read_status, > .suspend = genphy_suspend, > @@ -543,6 +580,7 @@ static struct phy_driver tja11xx_driver[] = { > .features = PHY_BASIC_T1_FEATURES, > .probe = tja1102_p0_probe, > .soft_reset = tja11xx_soft_reset, > + .config_aneg = tja11xx_config_aneg, > .config_init = tja11xx_config_init, > .read_status = tja11xx_read_status, > .match_phy_device = tja1102_p0_match_phy_device, > @@ -561,6 +599,7 @@ static struct phy_driver tja11xx_driver[] = { > .features = PHY_BASIC_T1_FEATURES, > /* currently no probe for Port 1 is need */ > .soft_reset = tja11xx_soft_reset, > + .config_aneg = tja11xx_config_aneg, > .config_init = tja11xx_config_init, > .read_status = tja11xx_read_status, > .match_phy_device = tja1102_p1_match_phy_device, > -- > 2.26.0.rc2 > >
diff --git a/drivers/net/phy/nxp-tja11xx.c b/drivers/net/phy/nxp-tja11xx.c index 2bde9386baf1f..0042ee453cbd4 100644 --- a/drivers/net/phy/nxp-tja11xx.c +++ b/drivers/net/phy/nxp-tja11xx.c @@ -30,6 +30,7 @@ #define MII_ECTRL_WAKE_REQUEST BIT(0) #define MII_CFG1 18 +#define MII_CFG1_MASTER_SLAVE BIT(15) #define MII_CFG1_AUTO_OP BIT(14) #define MII_CFG1_SLEEP_CONFIRM BIT(6) #define MII_CFG1_LED_MODE_MASK GENMASK(5, 4) @@ -177,6 +178,31 @@ static int tja11xx_soft_reset(struct phy_device *phydev) return genphy_soft_reset(phydev); } +static int tja11xx_config_aneg(struct phy_device *phydev) +{ + u16 ctl = 0; + int ret; + + switch (phydev->master_slave) { + case PORT_MODE_MASTER: + ctl |= MII_CFG1_MASTER_SLAVE; + break; + case PORT_MODE_SLAVE: + break; + case PORT_MODE_UNKNOWN: + return 0; + default: + phydev_warn(phydev, "Unsupported Master/Slave mode\n"); + return -ENOTSUPP; + } + + ret = phy_modify_changed(phydev, MII_CFG1, MII_CFG1_MASTER_SLAVE, ctl); + if (ret < 0) + return ret; + + return __genphy_config_aneg(phydev, ret); +} + static int tja11xx_config_init(struct phy_device *phydev) { int ret; @@ -245,6 +271,15 @@ static int tja11xx_read_status(struct phy_device *phydev) if (!(ret & MII_COMMSTAT_LINK_UP)) phydev->link = 0; + + ret = phy_read(phydev, MII_CFG1); + if (ret < 0) + return ret; + + if (ret & MII_CFG1_MASTER_SLAVE) + phydev->master_slave = PORT_MODE_MASTER; + else + phydev->master_slave = PORT_MODE_SLAVE; } return 0; @@ -514,6 +549,7 @@ static struct phy_driver tja11xx_driver[] = { .features = PHY_BASIC_T1_FEATURES, .probe = tja11xx_probe, .soft_reset = tja11xx_soft_reset, + .config_aneg = tja11xx_config_aneg, .config_init = tja11xx_config_init, .read_status = tja11xx_read_status, .suspend = genphy_suspend, @@ -529,6 +565,7 @@ static struct phy_driver tja11xx_driver[] = { .features = PHY_BASIC_T1_FEATURES, .probe = tja11xx_probe, .soft_reset = tja11xx_soft_reset, + .config_aneg = tja11xx_config_aneg, .config_init = tja11xx_config_init, .read_status = tja11xx_read_status, .suspend = genphy_suspend, @@ -543,6 +580,7 @@ static struct phy_driver tja11xx_driver[] = { .features = PHY_BASIC_T1_FEATURES, .probe = tja1102_p0_probe, .soft_reset = tja11xx_soft_reset, + .config_aneg = tja11xx_config_aneg, .config_init = tja11xx_config_init, .read_status = tja11xx_read_status, .match_phy_device = tja1102_p0_match_phy_device, @@ -561,6 +599,7 @@ static struct phy_driver tja11xx_driver[] = { .features = PHY_BASIC_T1_FEATURES, /* currently no probe for Port 1 is need */ .soft_reset = tja11xx_soft_reset, + .config_aneg = tja11xx_config_aneg, .config_init = tja11xx_config_init, .read_status = tja11xx_read_status, .match_phy_device = tja1102_p1_match_phy_device,
The TJA11xx PHYs have a vendor specific Master/Slave configuration bit, which is not compatible with IEEE 803.2-2018 spec for 100Base-T1 devices. So, provide a custom config_ange call back to solve this problem. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> --- drivers/net/phy/nxp-tja11xx.c | 39 +++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+)