From patchwork Tue Jan 14 11:24:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Grzeschik X-Patchwork-Id: 1222714 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 47xp5G4pzVz9s29 for ; Tue, 14 Jan 2020 22:24:34 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729016AbgANLYd (ORCPT ); Tue, 14 Jan 2020 06:24:33 -0500 Received: from metis.ext.pengutronix.de ([85.220.165.71]:35165 "EHLO metis.ext.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725956AbgANLYd (ORCPT ); Tue, 14 Jan 2020 06:24:33 -0500 Received: from dude.hi.pengutronix.de ([2001:67c:670:100:1d::7]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1irKJD-0003xD-8l; Tue, 14 Jan 2020 12:24:31 +0100 Received: from mgr by dude.hi.pengutronix.de with local (Exim 4.92) (envelope-from ) id 1irKJB-0006An-HC; Tue, 14 Jan 2020 12:24:29 +0100 From: Michael Grzeschik To: netdev@vger.kernel.org Cc: andrew@lunn.ch, f.fainelli@gmail.com, hkallweit1@gmail.com, kernel@pengutronix.de Subject: [PATCH] net: phy: dp83867: Set FORCE_LINK_GOOD do default after reset Date: Tue, 14 Jan 2020 12:24:25 +0100 Message-Id: <20200114112425.19967-1-m.grzeschik@pengutronix.de> X-Mailer: git-send-email 2.25.0.rc1 MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::7 X-SA-Exim-Mail-From: mgr@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: netdev@vger.kernel.org Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org According to the Datasheet this bit should be 0 (Normal operation) in default. With the FORCE_LINK_GOOD bit set, it is not possible to get a link. This patch sets FORCE_LINK_GOOD to the default value after resetting the phy. Signed-off-by: Michael Grzeschik --- drivers/net/phy/dp83867.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c index adda0d0eab800..60a09fabf41d1 100644 --- a/drivers/net/phy/dp83867.c +++ b/drivers/net/phy/dp83867.c @@ -99,6 +99,7 @@ #define DP83867_PHYCR_TX_FIFO_DEPTH_MASK GENMASK(15, 14) #define DP83867_PHYCR_RX_FIFO_DEPTH_MASK GENMASK(13, 12) #define DP83867_PHYCR_RESERVED_MASK BIT(11) +#define DP83867_PHYCR_FORCE_LINK_GOOD BIT(10) /* RGMIIDCTL bits */ #define DP83867_RGMII_TX_CLK_DELAY_MAX 0xf @@ -627,7 +628,7 @@ static int dp83867_config_init(struct phy_device *phydev) static int dp83867_phy_reset(struct phy_device *phydev) { - int err; + int val, err; err = phy_write(phydev, DP83867_CTRL, DP83867_SW_RESET); if (err < 0) @@ -635,6 +636,16 @@ static int dp83867_phy_reset(struct phy_device *phydev) usleep_range(10, 20); + /* After reset FORCE_LINK_GOOD bit is set. Although the + * default value should be unset. Disable FORCE_LINK_GOOD + * for the phy to work properly. + */ + val = phy_read(phydev, MII_DP83867_PHYCTRL); + if (val & DP83867_PHYCR_FORCE_LINK_GOOD) { + val &= ~(DP83867_PHYCR_FORCE_LINK_GOOD); + phy_write(phydev, MII_DP83867_PHYCTRL, val); + } + return 0; }