From patchwork Fri Dec 21 01:58:40 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 1017229 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=denx.de Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43LWyY510rz9sDB for ; Fri, 21 Dec 2018 12:59:17 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390797AbeLUB7O (ORCPT ); Thu, 20 Dec 2018 20:59:14 -0500 Received: from mail-out.m-online.net ([212.18.0.10]:42103 "EHLO mail-out.m-online.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390774AbeLUB7I (ORCPT ); Thu, 20 Dec 2018 20:59:08 -0500 Received: from frontend01.mail.m-online.net (unknown [192.168.8.182]) by mail-out.m-online.net (Postfix) with ESMTP id 43LWyK4Jrpz1qvNr; Fri, 21 Dec 2018 02:59:05 +0100 (CET) Received: from localhost (dynscan1.mnet-online.de [192.168.6.70]) by mail.m-online.net (Postfix) with ESMTP id 43LWyK47Qpz1qsJV; Fri, 21 Dec 2018 02:59:05 +0100 (CET) X-Virus-Scanned: amavisd-new at mnet-online.de Received: from mail.mnet-online.de ([192.168.8.182]) by localhost (dynscan1.mail.m-online.net [192.168.6.70]) (amavisd-new, port 10024) with ESMTP id ty6-Jgbcq2RV; Fri, 21 Dec 2018 02:59:04 +0100 (CET) X-Auth-Info: OkkJHpQ2D/NoxQ/PTcqPh8kCnkYuTeGu6I7z+cPR230= Received: from kurokawa.lan (ip-86-49-110-70.net.upcbroadband.cz [86.49.110.70]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.mnet-online.de (Postfix) with ESMTPSA; Fri, 21 Dec 2018 02:59:04 +0100 (CET) From: Marek Vasut To: netdev@vger.kernel.org Cc: f.fainelli@gmail.com, andrew@lunn.ch, Marek Vasut , Tristram Ha , Woojung Huh Subject: [RFT][PATCH V2 09/10] net: dsa: microchip: Factor out regmap config generation into common header Date: Fri, 21 Dec 2018 02:58:40 +0100 Message-Id: <20181221015841.6992-10-marex@denx.de> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181221015841.6992-1-marex@denx.de> References: <20181221015841.6992-1-marex@denx.de> MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The regmap config tables are rather similar for various generations of the KSZ8xxx/KSZ9xxx switches. Introduce a macro which allows generating those tables without duplication. Note that $regalign parameter is not used right now, but will be used in KSZ87xx series switches. Signed-off-by: Marek Vasut Cc: Andrew Lunn Cc: Florian Fainelli Cc: Tristram Ha Cc: Woojung Huh --- V2: New patch --- drivers/net/dsa/microchip/ksz9477_spi.c | 28 ++--------------------- drivers/net/dsa/microchip/ksz_common.h | 30 +++++++++++++++++++++++++ 2 files changed, 32 insertions(+), 26 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz9477_spi.c b/drivers/net/dsa/microchip/ksz9477_spi.c index b440641f4898..29b51524cae9 100644 --- a/drivers/net/dsa/microchip/ksz9477_spi.c +++ b/drivers/net/dsa/microchip/ksz9477_spi.c @@ -14,36 +14,12 @@ #include #include "ksz_priv.h" +#include "ksz_common.h" #define SPI_ADDR_SHIFT 24 #define SPI_TURNAROUND_SHIFT 5 -/* SPI frame opcodes */ -#define KS_SPIOP_RD 3 -#define KS_SPIOP_WR 2 - -#define KS_SPIOP_FLAG_MASK(opcode) \ - cpu_to_be16((opcode) << (SPI_ADDR_SHIFT + SPI_TURNAROUND_SHIFT)) - -#define KSZ_REGMAP_COMMON(width) \ - { \ - .val_bits = (width), \ - .reg_stride = (width) / 8, \ - .reg_bits = SPI_ADDR_SHIFT, \ - .pad_bits = SPI_TURNAROUND_SHIFT, \ - .max_register = 0xF00, \ - .cache_type = REGCACHE_NONE, \ - .read_flag_mask = KS_SPIOP_FLAG_MASK(KS_SPIOP_RD), \ - .write_flag_mask = KS_SPIOP_FLAG_MASK(KS_SPIOP_WR), \ - .reg_format_endian = REGMAP_ENDIAN_BIG, \ - .val_format_endian = REGMAP_ENDIAN_BIG \ - } - -static const struct regmap_config ksz9477_regmap_config[] = { - KSZ_REGMAP_COMMON(8), - KSZ_REGMAP_COMMON(16), - KSZ_REGMAP_COMMON(32), -}; +KSZ_REGMAP_TABLE(ksz9477, SPI_ADDR_SHIFT, SPI_TURNAROUND_SHIFT, 0); static int ksz9477_spi_probe(struct spi_device *spi) { diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/microchip/ksz_common.h index 903e3e39bfd4..4d30a67c14a3 100644 --- a/drivers/net/dsa/microchip/ksz_common.h +++ b/drivers/net/dsa/microchip/ksz_common.h @@ -114,4 +114,34 @@ static inline void ksz_pwrite32(struct ksz_device *dev, int port, int offset, ksz_write32(dev, dev->dev_ops->get_port_addr(port, offset), data); } +/* Regmap tables generation */ +#define KSZ_SPI_OP_RD 3 +#define KSZ_SPI_OP_WR 2 + +#define KSZ_SPI_OP_FLAG_MASK(opcode, regbits, regpad) \ + cpu_to_be16((opcode) << ((regbits) + (regpad))) + +#define KSZ_REGMAP_ENTRY(width, regbits, regpad, regalign) \ + { \ + .val_bits = (width), \ + .reg_stride = (width) / 8, \ + .reg_bits = (regbits) + (regalign), \ + .pad_bits = (regpad), \ + .max_register = 0xF00, \ + .cache_type = REGCACHE_NONE, \ + .read_flag_mask = \ + KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_RD, regbits, regpad), \ + .write_flag_mask = \ + KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_WR, regbits, regpad), \ + .reg_format_endian = REGMAP_ENDIAN_BIG, \ + .val_format_endian = REGMAP_ENDIAN_BIG \ + } + +#define KSZ_REGMAP_TABLE(ksz, regbits, regpad, regalign) \ + static const struct regmap_config ksz##_regmap_config[] = { \ + KSZ_REGMAP_ENTRY(8, (regbits), (regpad), (regalign)), \ + KSZ_REGMAP_ENTRY(16, (regbits), (regpad), (regalign)), \ + KSZ_REGMAP_ENTRY(32, (regbits), (regpad), (regalign)), \ + } + #endif