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[mlx5-next,1/2] net/mlx5: Add shared Q counter bits

Message ID 20181209105236.26233-2-leon@kernel.org
State Awaiting Upstream, archived
Delegated to: David Miller
Headers show
Series Allocate the per-port Q counter | expand

Commit Message

Leon Romanovsky Dec. 9, 2018, 10:52 a.m. UTC 
From: Leon Romanovsky <leonro@mellanox.com>

Updated HW specification file with needed bits to allow
sharing of Q counters between DEVX contexts and kernel.

Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
---
 include/linux/mlx5/mlx5_ifc.h | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)
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Patch

diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index 52393fbcf3b4..15093356a226 100644
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -85,6 +85,10 @@  enum {
 	MLX5_OBJ_TYPE_UMEM = 0x0005,
 };
 
+enum {
+	MLX5_SHARED_RESOURCE_UID = 0xffff,
+};
+
 enum {
 	MLX5_CMD_OP_QUERY_HCA_CAP                 = 0x100,
 	MLX5_CMD_OP_QUERY_ADAPTER                 = 0x101,
@@ -7464,7 +7468,7 @@  struct mlx5_ifc_alloc_q_counter_out_bits {
 
 struct mlx5_ifc_alloc_q_counter_in_bits {
 	u8         opcode[0x10];
-	u8         reserved_at_10[0x10];
+	u8         uid[0x10];
 
 	u8         reserved_at_20[0x10];
 	u8         op_mod[0x10];