| Message ID | 20180730125313.3405-1-quentin.schulz@bootlin.com |
|---|---|
| State | Accepted, archived |
| Delegated to: | David Miller |
| Headers | show |
| Series | [net-next] net: phy: mscc: the extended page access register is 16 bits | expand |
On Mon, Jul 30, 2018 at 02:53:13PM +0200, Quentin Schulz wrote: > The Extended Page Access is a 16-bit register, so change the page > parameter of vsc85xx_phy_page_set to a u16. > > Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Andrew
On 30/07/2018 14:53:13+0200, Quentin Schulz wrote: > The Extended Page Access is a 16-bit register, so change the page > parameter of vsc85xx_phy_page_set to a u16. > > Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> > --- > drivers/net/phy/mscc.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/net/phy/mscc.c b/drivers/net/phy/mscc.c > index 650c2667d523..84ca9ff40ae0 100644 > --- a/drivers/net/phy/mscc.c > +++ b/drivers/net/phy/mscc.c > @@ -123,7 +123,7 @@ static const struct vsc8531_edge_rate_table edge_table[] = { > }; > #endif /* CONFIG_OF_MDIO */ > > -static int vsc85xx_phy_page_set(struct phy_device *phydev, u8 page) > +static int vsc85xx_phy_page_set(struct phy_device *phydev, u16 page) > { > int rc; > > -- > 2.17.1 >
From: Quentin Schulz <quentin.schulz@bootlin.com> Date: Mon, 30 Jul 2018 14:53:13 +0200 > The Extended Page Access is a 16-bit register, so change the page > parameter of vsc85xx_phy_page_set to a u16. > > Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> Applied.
On 07/30/2018 05:53 AM, Quentin Schulz wrote: > The Extended Page Access is a 16-bit register, so change the page > parameter of vsc85xx_phy_page_set to a u16. > > Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> Since you targeted net-next for this patch, I am assuming this is not yet a problem, but would soon be one with the changes you plan on introducing? > --- > drivers/net/phy/mscc.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/net/phy/mscc.c b/drivers/net/phy/mscc.c > index 650c2667d523..84ca9ff40ae0 100644 > --- a/drivers/net/phy/mscc.c > +++ b/drivers/net/phy/mscc.c > @@ -123,7 +123,7 @@ static const struct vsc8531_edge_rate_table edge_table[] = { > }; > #endif /* CONFIG_OF_MDIO */ > > -static int vsc85xx_phy_page_set(struct phy_device *phydev, u8 page) > +static int vsc85xx_phy_page_set(struct phy_device *phydev, u16 page) > { > int rc; > >
Hi Florian, On Mon, Jul 30, 2018 at 09:53:31AM -0700, Florian Fainelli wrote: > On 07/30/2018 05:53 AM, Quentin Schulz wrote: > > The Extended Page Access is a 16-bit register, so change the page > > parameter of vsc85xx_phy_page_set to a u16. > > > > Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> > > Since you targeted net-next for this patch, I am assuming this is not > yet a problem, but would soon be one with the changes you plan on > introducing? > Yes indeed. When I get the quad-port PHY things to go as planned, then I'll need sometimes to change to a page that is above the size of a u16. For now, all the pages are accessed with a number that is lower than the size of a u16, so it isn't a problem. Quentin
diff --git a/drivers/net/phy/mscc.c b/drivers/net/phy/mscc.c index 650c2667d523..84ca9ff40ae0 100644 --- a/drivers/net/phy/mscc.c +++ b/drivers/net/phy/mscc.c @@ -123,7 +123,7 @@ static const struct vsc8531_edge_rate_table edge_table[] = { }; #endif /* CONFIG_OF_MDIO */ -static int vsc85xx_phy_page_set(struct phy_device *phydev, u8 page) +static int vsc85xx_phy_page_set(struct phy_device *phydev, u16 page) { int rc;
The Extended Page Access is a 16-bit register, so change the page parameter of vsc85xx_phy_page_set to a u16. Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> --- drivers/net/phy/mscc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)