| Message ID | 20180411141641.14675-6-icenowy@aosc.io |
|---|---|
| State | Changes Requested, archived |
| Delegated to: | David Miller |
| Headers | show |
| Series | Add support in dwmac-sun8i for accessing EMAC clock | expand |
Hi, On Wed, Apr 11, 2018 at 10:16:41PM +0800, Icenowy Zheng wrote: > Allwinner A64 has a SRAM controller, and in the device tree currently > we have a syscon node to enable EMAC driver to access the EMAC clock > register. As SRAM controller driver can now export regmap for this > register, replace the syscon node to the SRAM controller device node, > and let EMAC driver to acquire its EMAC clock regmap. > > Signed-off-by: Icenowy Zheng <icenowy@aosc.io> > --- > arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 23 +++++++++++++++++++---- > 1 file changed, 19 insertions(+), 4 deletions(-) > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > index 1b2ef28c42bd..1c37659d9d41 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > @@ -168,10 +168,25 @@ > #size-cells = <1>; > ranges; > > - syscon: syscon@1c00000 { > - compatible = "allwinner,sun50i-a64-system-controller", > - "syscon"; > + sram_controller: sram-controller@1c00000 { > + compatible = "allwinner,sun50i-a64-sram-controller"; > reg = <0x01c00000 0x1000>; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges; > + > + sram_c: sram@18000 { > + compatible = "mmio-sram"; > + reg = <0x00018000 0x28000>; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0 0x00018000 0x28000>; > + > + de2_sram: sram-section@0 { > + compatible = "allwinner,sun50i-a64-sram-c"; > + reg = <0x0000 0x28000>; > + }; > + }; That doesn't look related at all to what's being discussed here, so you'd rather add it as part of your DE2-enablement serie (or amend your commit log to say why this is important to do it in this patch). Maxime
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index 1b2ef28c42bd..1c37659d9d41 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -168,10 +168,25 @@ #size-cells = <1>; ranges; - syscon: syscon@1c00000 { - compatible = "allwinner,sun50i-a64-system-controller", - "syscon"; + sram_controller: sram-controller@1c00000 { + compatible = "allwinner,sun50i-a64-sram-controller"; reg = <0x01c00000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + sram_c: sram@18000 { + compatible = "mmio-sram"; + reg = <0x00018000 0x28000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x00018000 0x28000>; + + de2_sram: sram-section@0 { + compatible = "allwinner,sun50i-a64-sram-c"; + reg = <0x0000 0x28000>; + }; + }; }; dma: dma-controller@1c02000 { @@ -599,7 +614,7 @@ emac: ethernet@1c30000 { compatible = "allwinner,sun50i-a64-emac"; - syscon = <&syscon>; + syscon = <&sram_controller>; reg = <0x01c30000 0x10000>; interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "macirq";
Allwinner A64 has a SRAM controller, and in the device tree currently we have a syscon node to enable EMAC driver to access the EMAC clock register. As SRAM controller driver can now export regmap for this register, replace the syscon node to the SRAM controller device node, and let EMAC driver to acquire its EMAC clock regmap. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 23 +++++++++++++++++++---- 1 file changed, 19 insertions(+), 4 deletions(-)