diff mbox

gianfar: Enable eTSEC-106 erratum w/a for MPC8548E Rev2

Message ID 20160303.090751.336624849.nemoto@toshiba-tops.co.jp
State Accepted, archived
Delegated to: David Miller
Headers show

Commit Message

Atsushi Nemoto March 3, 2016, 12:07 a.m. UTC
Enable workaround for MPC8548E erratum eTSEC 106,
"Excess delays when transmitting TOE=1 large frames".
(see commit 53fad77375ce "gianfar: Enable eTSEC-20 erratum w/a
for P2020 Rev1")

This erratum was fixed in Rev 3.1.x.

Signed-off-by: Atsushi Nemoto <nemoto@toshiba-tops.co.jp>
---
 drivers/net/ethernet/freescale/gianfar.c |    4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)

--

Comments

Claudiu Manoil March 3, 2016, 9:10 a.m. UTC | #1
>-----Original Message-----
>From: Atsushi Nemoto [mailto:nemoto@toshiba-tops.co.jp]
>Sent: Thursday, March 03, 2016 2:08 AM
>To: Claudiu Manoil <claudiu.manoil@freescale.com>; netdev@vger.kernel.org
>Subject: [PATCH] gianfar: Enable eTSEC-106 erratum w/a for MPC8548E Rev2
>
>Enable workaround for MPC8548E erratum eTSEC 106,
>"Excess delays when transmitting TOE=1 large frames".
>(see commit 53fad77375ce "gianfar: Enable eTSEC-20 erratum w/a
>for P2020 Rev1")
>
>This erratum was fixed in Rev 3.1.x.
>

(Confirmed with MPC8548E Chip Errata document, rev 9. Thanks.)

Acked-by: Claudiu Manoil <claudiu.manoil@freescale.com>
David Miller March 7, 2016, 3:45 a.m. UTC | #2
From: Atsushi Nemoto <nemoto@toshiba-tops.co.jp>
Date: Thu, 3 Mar 2016 09:07:51 +0900

> Enable workaround for MPC8548E erratum eTSEC 106,
> "Excess delays when transmitting TOE=1 large frames".
> (see commit 53fad77375ce "gianfar: Enable eTSEC-20 erratum w/a
> for P2020 Rev1")
> 
> This erratum was fixed in Rev 3.1.x.
> 
> Signed-off-by: Atsushi Nemoto <nemoto@toshiba-tops.co.jp>

Applied, thanks.
diff mbox

Patch

diff --git a/drivers/net/ethernet/freescale/gianfar.c b/drivers/net/ethernet/freescale/gianfar.c
index 2aa7b40..b9ecf19 100644
--- a/drivers/net/ethernet/freescale/gianfar.c
+++ b/drivers/net/ethernet/freescale/gianfar.c
@@ -1111,8 +1111,10 @@  static void __gfar_detect_errata_85xx(struct gfar_private *priv)
 
 	if ((SVR_SOC_VER(svr) == SVR_8548) && (SVR_REV(svr) == 0x20))
 		priv->errata |= GFAR_ERRATA_12;
+	/* P2020/P1010 Rev 1; MPC8548 Rev 2 */
 	if (((SVR_SOC_VER(svr) == SVR_P2020) && (SVR_REV(svr) < 0x20)) ||
-	    ((SVR_SOC_VER(svr) == SVR_P2010) && (SVR_REV(svr) < 0x20)))
+	    ((SVR_SOC_VER(svr) == SVR_P2010) && (SVR_REV(svr) < 0x20)) ||
+	    ((SVR_SOC_VER(svr) == SVR_8548) && (SVR_REV(svr) < 0x31)))
 		priv->errata |= GFAR_ERRATA_76; /* aka eTSEC 20 */
 }
 #endif