From patchwork Thu Sep 23 03:15:33 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kirsher, Jeffrey T" X-Patchwork-Id: 65490 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id E7D16B70DB for ; Thu, 23 Sep 2010 13:15:57 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752066Ab0IWDPx (ORCPT ); Wed, 22 Sep 2010 23:15:53 -0400 Received: from qmta10.westchester.pa.mail.comcast.net ([76.96.62.17]:34262 "EHLO qmta10.westchester.pa.mail.comcast.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751893Ab0IWDPx (ORCPT ); Wed, 22 Sep 2010 23:15:53 -0400 Received: from omta03.westchester.pa.mail.comcast.net ([76.96.62.27]) by qmta10.westchester.pa.mail.comcast.net with comcast id 9p3d1f0040bG4ec5A3FteS; Thu, 23 Sep 2010 03:15:53 +0000 Received: from localhost.localdomain ([63.64.152.142]) by omta03.westchester.pa.mail.comcast.net with comcast id A3Fa1f00C34bfcX3P3Fc12; Thu, 23 Sep 2010 03:15:51 +0000 From: Jeff Kirsher Subject: [net-2.6 PATCH 2/6] e1000e: 82579 SMBus address and LEDs incorrect after device reset To: davem@davemloft.net Cc: netdev@vger.kernel.org, gospo@redhat.com, bphilips@novell.com, Bruce Allan , Jeff Kirsher Date: Wed, 22 Sep 2010 20:15:33 -0700 Message-ID: <20100923031532.10976.41477.stgit@localhost.localdomain> In-Reply-To: <20100923031432.10976.81909.stgit@localhost.localdomain> References: <20100923031432.10976.81909.stgit@localhost.localdomain> User-Agent: StGIT/0.14.3 MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: Bruce Allan Since the hardware is prevented from performing automatic PHY configuration (the driver does it instead), the OEM_WRITE_ENABLE bit in the EXTCNF_CTRL register will not get cleared preventing the SMBus address and the LED configuration to be written to the PHY registers. On 82579, do not check the OEM_WRITE_ENABLE bit. Signed-off-by: Bruce Allan Tested-by: Jeff Pieper Signed-off-by: Jeff Kirsher --- drivers/net/e1000e/ich8lan.c | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe netdev" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/net/e1000e/ich8lan.c b/drivers/net/e1000e/ich8lan.c index 822de48..fc8c3ce 100644 --- a/drivers/net/e1000e/ich8lan.c +++ b/drivers/net/e1000e/ich8lan.c @@ -990,9 +990,9 @@ static s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw) cnf_base_addr = data & E1000_EXTCNF_CTRL_EXT_CNF_POINTER_MASK; cnf_base_addr >>= E1000_EXTCNF_CTRL_EXT_CNF_POINTER_SHIFT; - if (!(data & E1000_EXTCNF_CTRL_OEM_WRITE_ENABLE) && - ((hw->mac.type == e1000_pchlan) || - (hw->mac.type == e1000_pch2lan))) { + if ((!(data & E1000_EXTCNF_CTRL_OEM_WRITE_ENABLE) && + (hw->mac.type == e1000_pchlan)) || + (hw->mac.type == e1000_pch2lan)) { /* * HW configures the SMBus address and LEDs when the * OEM and LCD Write Enable bits are set in the NVM.