@@ -4374,10 +4374,10 @@ int stmmac_dvr_probe(struct device *device,
* set the MDC clock dynamically according to the csr actual
* clock input.
*/
- if (!priv->plat->clk_csr)
- stmmac_clk_csr_set(priv);
- else
+ if (priv->plat->clk_csr >= 0)
priv->clk_csr = priv->plat->clk_csr;
+ else
+ stmmac_clk_csr_set(priv);
stmmac_check_pcs_mode(priv);
@@ -408,7 +408,10 @@ struct plat_stmmacenet_data *
/* Default to phy auto-detection */
plat->phy_addr = -1;
- /* Get clk_csr from device tree */
+ /* Default to get clk_csr from stmmac_clk_crs_set(),
+ * or get clk_csr from device tree.
+ */
+ plat->clk_csr = -1;
of_property_read_u32(np, "clk_csr", &plat->clk_csr);
/* "snps,phy-addr" is not a standard property. Mark it as deprecated
The specific clk_csr value can be zero, and stmmac_clk is necessary for MDC clock which can be set dynamically. So, change the condition from plat->clk_csr to plat->stmmac_clk to fix clk_csr can't be zero issue. Fixes: cd7201f477b9 ("stmmac: MDC clock dynamically based on the csr clock input") Signed-off-by: Biao Huang <biao.huang@mediatek.com> --- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 6 +++--- .../net/ethernet/stmicro/stmmac/stmmac_platform.c | 5 ++++- 2 files changed, 7 insertions(+), 4 deletions(-)