From patchwork Fri Mar 1 03:57:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tristram.Ha@microchip.com X-Patchwork-Id: 1049923 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=microchip.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 449bGb5C8Wz9sMQ for ; Fri, 1 Mar 2019 14:57:27 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727952AbfCAD5Y (ORCPT ); Thu, 28 Feb 2019 22:57:24 -0500 Received: from esa5.microchip.iphmx.com ([216.71.150.166]:47415 "EHLO esa5.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727147AbfCAD5Y (ORCPT ); Thu, 28 Feb 2019 22:57:24 -0500 X-IronPort-AV: E=Sophos;i="5.58,425,1544511600"; d="scan'208";a="25431535" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa5.microchip.iphmx.com with ESMTP/TLS/DHE-RSA-AES256-SHA; 28 Feb 2019 20:57:23 -0700 Received: from localhost.localdomain (10.10.76.4) by chn-sv-exch04.mchp-main.com (10.10.76.105) with Microsoft SMTP Server id 14.3.352.0; Thu, 28 Feb 2019 20:57:22 -0700 From: To: Andrew Lunn , Florian Fainelli , Pavel Machek CC: Tristram Ha , , Subject: [PATCH v1 net-next 1/3] dt-bindings: net: dsa: document additional Microchip KSZ9477 family switches Date: Thu, 28 Feb 2019 19:57:22 -0800 Message-ID: <1551412644-17319-2-git-send-email-Tristram.Ha@microchip.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1551412644-17319-1-git-send-email-Tristram.Ha@microchip.com> References: <1551412644-17319-1-git-send-email-Tristram.Ha@microchip.com> MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: Tristram Ha Document additional Microchip KSZ9477 family switches. Show how KSZ8565 switch should be configured as the host port is port 7 instead of port 5. Signed-off-by: Tristram Ha Reviewed-by: Florian Fainelli --- Documentation/devicetree/bindings/net/dsa/ksz.txt | 43 +++++++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/Documentation/devicetree/bindings/net/dsa/ksz.txt b/Documentation/devicetree/bindings/net/dsa/ksz.txt index 8d58c2a..e7db726 100644 --- a/Documentation/devicetree/bindings/net/dsa/ksz.txt +++ b/Documentation/devicetree/bindings/net/dsa/ksz.txt @@ -7,6 +7,11 @@ Required properties: of the following: - "microchip,ksz9477" - "microchip,ksz9897" + - "microchip,ksz9896" + - "microchip,ksz9567" + - "microchip,ksz8565" + - "microchip,ksz9893" + - "microchip,ksz9563" Optional properties: @@ -73,4 +78,42 @@ Ethernet switch connected via SPI to the host, CPU port wired to eth0: }; }; }; + ksz8565: ksz8565@0 { + compatible = "microchip,ksz8565"; + reg = <0>; + + spi-max-frequency = <44000000>; + spi-cpha; + spi-cpol; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + label = "lan1"; + }; + port@1 { + reg = <1>; + label = "lan2"; + }; + port@2 { + reg = <2>; + label = "lan3"; + }; + port@3 { + reg = <3>; + label = "lan4"; + }; + port@6 { + reg = <6>; + label = "cpu"; + ethernet = <ð0>; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + }; };