From patchwork Sat Oct 15 19:27:50 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Jarzmik X-Patchwork-Id: 682591 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3sxF802RHYz9s9c for ; Sun, 16 Oct 2016 06:36:16 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755847AbcJOTgN (ORCPT ); Sat, 15 Oct 2016 15:36:13 -0400 Received: from smtp06.smtpout.orange.fr ([80.12.242.128]:50465 "EHLO smtp.smtpout.orange.fr" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753295AbcJOTgK (ORCPT ); Sat, 15 Oct 2016 15:36:10 -0400 Received: from belgarion.home ([109.220.223.51]) by mwinf5d29 with ME id vvUb1t00D179CVZ03vUe0h; Sat, 15 Oct 2016 21:28:39 +0200 X-ME-Helo: belgarion.home X-ME-Date: Sat, 15 Oct 2016 21:28:39 +0200 X-ME-IP: 109.220.223.51 From: Robert Jarzmik To: Rob Herring , Mark Rutland , Nicolas Pitre , Russell King - ARM Linux , Arnd Bergmann Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Robert Jarzmik , Jeremy Linton Subject: [PATCH v2 3/3] net: smsc91x: add u16 workaround for pxa platforms Date: Sat, 15 Oct 2016 21:27:50 +0200 Message-Id: <1476559670-25056-4-git-send-email-robert.jarzmik@free.fr> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1476559670-25056-1-git-send-email-robert.jarzmik@free.fr> References: <1476559670-25056-1-git-send-email-robert.jarzmik@free.fr> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Add a workaround for mainstone, idp and stargate2 boards, for u16 writes which must be aligned on 32 bits addresses. Signed-off-by: Robert Jarzmik Cc: Jeremy Linton --- Since v1: rename dt property to pxa-u16-align4 change the binding documentation file --- Documentation/devicetree/bindings/net/smsc-lan91c111.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/net/smsc-lan91c111.txt b/Documentation/devicetree/bindings/net/smsc-lan91c111.txt index e77e167593db..309e37eb7c7c 100644 --- a/Documentation/devicetree/bindings/net/smsc-lan91c111.txt +++ b/Documentation/devicetree/bindings/net/smsc-lan91c111.txt @@ -13,3 +13,5 @@ Optional properties: 16-bit access only. - power-gpios: GPIO to control the PWRDWN pin - reset-gpios: GPIO to control the RESET pin +- pxa-u16-align4 : Boolean, put in place the workaround the force all + u16 writes to be 32 bits aligned