From patchwork Sat Apr 23 09:05:06 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Yisen.Zhuang(Zhuangyuzeng)" X-Patchwork-Id: 613997 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3qsR4s5jVLz9sCY for ; Sat, 23 Apr 2016 18:49:49 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752070AbcDWIsp (ORCPT ); Sat, 23 Apr 2016 04:48:45 -0400 Received: from szxga02-in.huawei.com ([119.145.14.65]:47031 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751724AbcDWIsj (ORCPT ); Sat, 23 Apr 2016 04:48:39 -0400 Received: from 172.24.1.49 (EHLO SZXEML423-HUB.china.huawei.com) ([172.24.1.49]) by szxrg02-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id DFW56510; Sat, 23 Apr 2016 16:46:57 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by SZXEML423-HUB.china.huawei.com (10.82.67.154) with Microsoft SMTP Server id 14.3.235.1; Sat, 23 Apr 2016 16:46:40 +0800 From: Yisen Zhuang To: , , CC: , , , , , , , , , , , , , , , Subject: [PATCH v2 net-next 02/13] net: hns: set debug port irq index to 0 Date: Sat, 23 Apr 2016 17:05:06 +0800 Message-ID: <1461402317-136499-3-git-send-email-Yisen.Zhuang@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1461402317-136499-1-git-send-email-Yisen.Zhuang@huawei.com> References: <1461402317-136499-1-git-send-email-Yisen.Zhuang@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020202.571B3682.00A8, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2013-06-18 04:22:30, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 1d6a39362f7e50b7cb64cf086a5d98ee Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: Daode Huang As debug ports are moved from service dsaf to debug dsaf, the interrupts offset should start from 0, So this patch re-defines the offset index of debug ports. Signed-off-by: Daode Huang Signed-off-by: Yisen Zhuang --- drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.c | 8 +------- drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h | 5 +---- 2 files changed, 2 insertions(+), 11 deletions(-) diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.c b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.c index 121ba4e..054f391 100644 --- a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.c +++ b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.c @@ -445,20 +445,14 @@ static int hns_rcb_get_port_in_comm( #define SERVICE_RING_IRQ_IDX(v1) \ ((v1) ? HNS_SERVICE_RING_IRQ_IDX : HNSV2_SERVICE_RING_IRQ_IDX) -#define DEBUG_RING_IRQ_IDX(v1) \ - ((v1) ? HNS_DEBUG_RING_IRQ_IDX : HNSV2_DEBUG_RING_IRQ_IDX) -#define DEBUG_RING_IRQ_OFFSET(v1) \ - ((v1) ? HNS_DEBUG_RING_IRQ_OFFSET : HNSV2_DEBUG_RING_IRQ_OFFSET) static int hns_rcb_get_base_irq_idx(struct rcb_common_cb *rcb_common) { - int comm_index = rcb_common->comm_index; bool is_ver1 = AE_IS_VER1(rcb_common->dsaf_dev->dsaf_ver); if (!HNS_DSAF_IS_DEBUG(rcb_common->dsaf_dev)) return SERVICE_RING_IRQ_IDX(is_ver1); else - return DEBUG_RING_IRQ_IDX(is_ver1) + - (comm_index - 1) * DEBUG_RING_IRQ_OFFSET(is_ver1); + return HNS_DEBUG_RING_IRQ_IDX; } #define RCB_COMM_BASE_TO_RING_BASE(base, ringid)\ diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h index cffd244..8782608 100644 --- a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h +++ b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h @@ -10,12 +10,9 @@ #ifndef _DSAF_REG_H_ #define _DSAF_REG_H_ -#define HNS_DEBUG_RING_IRQ_IDX 55 +#define HNS_DEBUG_RING_IRQ_IDX 0 #define HNS_SERVICE_RING_IRQ_IDX 59 -#define HNS_DEBUG_RING_IRQ_OFFSET 2 -#define HNSV2_DEBUG_RING_IRQ_IDX 409 #define HNSV2_SERVICE_RING_IRQ_IDX 25 -#define HNSV2_DEBUG_RING_IRQ_OFFSET 9 #define DSAF_MAX_PORT_NUM_PER_CHIP 8 #define DSAF_SERVICE_PORT_NUM_PER_DSAF 6