From patchwork Thu Feb 18 10:32:46 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Saeed Mahameed X-Patchwork-Id: 584641 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 936651402C0 for ; Thu, 18 Feb 2016 21:43:01 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1946082AbcBRKmx (ORCPT ); Thu, 18 Feb 2016 05:42:53 -0500 Received: from [193.47.165.129] ([193.47.165.129]:34246 "EHLO mellanox.co.il" rhost-flags-FAIL-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1945939AbcBRKmt (ORCPT ); Thu, 18 Feb 2016 05:42:49 -0500 Received: from Internal Mail-Server by MTLPINE1 (envelope-from saeedm@mellanox.com) with ESMTPS (AES256-SHA encrypted); 18 Feb 2016 12:41:19 +0200 Received: from reg-l-vrt-045-010.mtl.labs.mlnx (reg-l-vrt-045-010.mtl.labs.mlnx [10.135.45.10]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id u1IAfGjE026611; Thu, 18 Feb 2016 12:41:16 +0200 From: Saeed Mahameed To: "David S. Miller" Cc: netdev@vger.kernel.org, Or Gerlitz , Tal Alon , Eran Ben Elisha , Tariq Toukan , Rana Shahout , Yevgeny Petrilin , Matthew Finlay , Achiad Shochat , Saeed Mahameed Subject: [PATCH net-next V1 05/12] net/mlx5e: Support DCBNL IEEE PFC Date: Thu, 18 Feb 2016 12:32:46 +0200 Message-Id: <1455791573-5270-6-git-send-email-saeedm@mellanox.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1455791573-5270-1-git-send-email-saeedm@mellanox.com> References: <1455791573-5270-1-git-send-email-saeedm@mellanox.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: Achiad Shochat Implement the set/get DCBNL IEEE PFC callbacks. Signed-off-by: Achiad Shochat Signed-off-by: Saeed Mahameed --- drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c | 39 ++++++++++++++++++++ 1 files changed, 39 insertions(+), 0 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c b/drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c index 402d032..cdbf39c 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c @@ -160,6 +160,43 @@ static int mlx5e_dcbnl_ieee_setets(struct net_device *netdev, return 0; } +static int mlx5e_dcbnl_ieee_getpfc(struct net_device *dev, + struct ieee_pfc *pfc) +{ + struct mlx5e_priv *priv = netdev_priv(dev); + struct mlx5_core_dev *mdev = priv->mdev; + + pfc->pfc_cap = mlx5_max_tc(mdev) + 1; + + return mlx5_query_port_pfc(mdev, &pfc->pfc_en, NULL); +} + +static int mlx5e_dcbnl_ieee_setpfc(struct net_device *dev, + struct ieee_pfc *pfc) +{ + struct mlx5e_priv *priv = netdev_priv(dev); + struct mlx5_core_dev *mdev = priv->mdev; + enum mlx5_port_status ps; + u8 curr_pfc_en; + int ret; + + mlx5_query_port_pfc(mdev, &curr_pfc_en, NULL); + + if (pfc->pfc_en == curr_pfc_en) + return 0; + + mlx5_query_port_admin_status(mdev, &ps); + if (ps == MLX5_PORT_UP) + mlx5_set_port_admin_status(mdev, MLX5_PORT_DOWN); + + ret = mlx5_set_port_pfc(mdev, pfc->pfc_en, pfc->pfc_en); + + if (ps == MLX5_PORT_UP) + mlx5_set_port_admin_status(mdev, MLX5_PORT_UP); + + return ret; +} + static u8 mlx5e_dcbnl_getdcbx(struct net_device *dev) { return DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_IEEE; @@ -179,6 +216,8 @@ static u8 mlx5e_dcbnl_setdcbx(struct net_device *dev, u8 mode) const struct dcbnl_rtnl_ops mlx5e_dcbnl_ops = { .ieee_getets = mlx5e_dcbnl_ieee_getets, .ieee_setets = mlx5e_dcbnl_ieee_setets, + .ieee_getpfc = mlx5e_dcbnl_ieee_getpfc, + .ieee_setpfc = mlx5e_dcbnl_ieee_setpfc, .getdcbx = mlx5e_dcbnl_getdcbx, .setdcbx = mlx5e_dcbnl_setdcbx, };