From patchwork Sun Nov 22 08:40:56 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Crispin X-Patchwork-Id: 547298 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id B888E1402A9 for ; Sun, 22 Nov 2015 19:42:18 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751680AbbKVIl6 (ORCPT ); Sun, 22 Nov 2015 03:41:58 -0500 Received: from arrakis.dune.hu ([78.24.191.176]:46190 "EHLO arrakis.dune.hu" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751375AbbKVIlX (ORCPT ); Sun, 22 Nov 2015 03:41:23 -0500 Received: from arrakis.dune.hu (localhost [127.0.0.1]) by arrakis.dune.hu (Postfix) with ESMTP id B10E328098D; Sun, 22 Nov 2015 09:39:17 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.3.2 (2011-06-06) on arrakis.dune.hu X-Spam-Level: X-Spam-Status: No, score=-1.5 required=5.0 tests=BAYES_00 autolearn=ham version=3.3.2 Received: from localhost.localdomain (p548C8D9F.dip0.t-ipconnect.de [84.140.141.159]) by arrakis.dune.hu (Postfix) with ESMTPSA; Sun, 22 Nov 2015 09:39:17 +0100 (CET) From: John Crispin To: "David S. Miller" Cc: netdev@vger.kernel.org, Michael Lee , Felix Fietkau , =?UTF-8?q?Steven=20Liu=20=28=E5=8A=89=E4=BA=BA=E8=B1=AA=29?= , =?UTF-8?q?Fred=20Chang=20=28=E5=BC=B5=E5=98=89=E5=AE=8F=29?= , John Crispin Subject: [RFC 6/8] net-next: ralink: add support for rt3883 Date: Sun, 22 Nov 2015 09:40:56 +0100 Message-Id: <1448181658-38111-6-git-send-email-blogic@openwrt.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1448181658-38111-1-git-send-email-blogic@openwrt.org> References: <1448181658-38111-1-git-send-email-blogic@openwrt.org> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Add support for rt3883 and its smaller version rt3662. They both have a single gBit port that will normally be attached to an external phy of switch. Signed-off-by: John Crispin Signed-off-by: Felix Fietkau Signed-off-by: Michael Lee --- drivers/net/ethernet/ralink/soc_rt3883.c | 75 ++++++++++++++++++++++++++++++ 1 file changed, 75 insertions(+) create mode 100644 drivers/net/ethernet/ralink/soc_rt3883.c diff --git a/drivers/net/ethernet/ralink/soc_rt3883.c b/drivers/net/ethernet/ralink/soc_rt3883.c new file mode 100644 index 0000000..f7b6769 --- /dev/null +++ b/drivers/net/ethernet/ralink/soc_rt3883.c @@ -0,0 +1,75 @@ +/* This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Copyright (C) 2009-2015 John Crispin + * Copyright (C) 2009-2015 Felix Fietkau + * Copyright (C) 2013-2015 Michael Lee + */ + +#include + +#include + +#include "ralink_soc_eth.h" +#include "mdio_rt2880.h" + +#define RT3883_RSTCTRL_FE BIT(21) + +static void rt3883_fe_reset(void) +{ + fe_reset(RT3883_RSTCTRL_FE); +} + +static int rt3883_fwd_config(struct fe_priv *priv) +{ + int ret; + + ret = fe_set_clock_cycle(priv); + if (ret) + return ret; + + fe_fwd_config(priv); + fe_w32(FE_PSE_FQFC_CFG_256Q, FE_PSE_FQ_CFG); + fe_csum_config(priv); + + return ret; +} + +static void rt3883_init_data(struct fe_soc_data *data, + struct net_device *netdev) +{ + struct fe_priv *priv = netdev_priv(netdev); + + priv->flags = FE_FLAG_PADDING_64B | FE_FLAG_PADDING_BUG | + FE_FLAG_JUMBO_FRAME; + netdev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | + NETIF_F_RXCSUM | NETIF_F_HW_VLAN_CTAG_TX; +} + +static struct fe_soc_data rt3883_data = { + .init_data = rt3883_init_data, + .reset_fe = rt3883_fe_reset, + .fwd_config = rt3883_fwd_config, + .pdma_glo_cfg = FE_PDMA_SIZE_8DWORDS, + .rx_int = FE_RX_DONE_INT, + .tx_int = FE_TX_DONE_INT, + .status_int = FE_CNT_GDM_AF, + .checksum_bit = RX_DMA_L4VALID, + .mdio_read = rt2880_mdio_read, + .mdio_write = rt2880_mdio_write, + .mdio_adjust_link = rt2880_mdio_link_adjust, + .port_init = rt2880_port_init, +}; + +const struct of_device_id of_fe_match[] = { + { .compatible = "ralink,rt3883-eth", .data = &rt3883_data }, + {}, +}; + +MODULE_DEVICE_TABLE(of, of_fe_match);