From patchwork Tue Sep 9 14:31:10 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 387342 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 8EE2B1400AB for ; Wed, 10 Sep 2014 00:32:30 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756695AbaIIOc0 (ORCPT ); Tue, 9 Sep 2014 10:32:26 -0400 Received: from devils.ext.ti.com ([198.47.26.153]:56050 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753329AbaIIOcZ (ORCPT ); Tue, 9 Sep 2014 10:32:25 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id s89EVS0m021082; Tue, 9 Sep 2014 09:31:28 -0500 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id s89EVSgZ004773; Tue, 9 Sep 2014 09:31:28 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.174.1; Tue, 9 Sep 2014 09:31:28 -0500 Received: from localhost.localdomain (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id s89EVD16002296; Tue, 9 Sep 2014 09:31:25 -0500 From: Roger Quadros To: , CC: , , , , , , , , , , , Roger Quadros Subject: [PATCH v2 3/3] net: can: c_can: Add support for START pulse in RAMINIT sequence Date: Tue, 9 Sep 2014 17:31:10 +0300 Message-ID: <1410273070-22485-4-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1410273070-22485-1-git-send-email-rogerq@ti.com> References: <1410273070-22485-1-git-send-email-rogerq@ti.com> MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Some SoCs e.g. (TI DRA7xx) need a START pulse to start the RAMINIT sequence i.e. START bit must be set and cleared before checking for the DONE bit status. Add a new DT property "raminit-pulse" to specify if this mechanism must be used for RAMINIT. Signed-off-by: Roger Quadros --- Documentation/devicetree/bindings/net/can/c_can.txt | 3 +++ drivers/net/can/c_can/c_can.h | 1 + drivers/net/can/c_can/c_can_platform.c | 8 ++++++++ 3 files changed, 12 insertions(+) diff --git a/Documentation/devicetree/bindings/net/can/c_can.txt b/Documentation/devicetree/bindings/net/can/c_can.txt index e12d1a1..705411f 100644 --- a/Documentation/devicetree/bindings/net/can/c_can.txt +++ b/Documentation/devicetree/bindings/net/can/c_can.txt @@ -19,6 +19,9 @@ Optional properties: register within the syscon region - ti,raminit-start-bit : Bit posistion of START bit in the RAMINIT register - ti,raminit-done-bit : Bit position of DONE bit in the RAMINIT register +- ti,raminit-pulse : Property must exist if START pulse is needed for RAMINIT + sequence i.e. START bit will be set and cleared before + checking for DONE bit. Note: "ti,hwmods" field is used to fetch the base address and irq resources from TI, omap hwmod data base during device registration. diff --git a/drivers/net/can/c_can/c_can.h b/drivers/net/can/c_can/c_can.h index bf68822..85b5ad0 100644 --- a/drivers/net/can/c_can/c_can.h +++ b/drivers/net/can/c_can/c_can.h @@ -175,6 +175,7 @@ struct c_can_raminit { unsigned int reg; /* register index within syscon */ u8 start_bit; /* START bit position in raminit reg. */ u8 done_bit; /* DONE bit position in raminit reg. */ + bool needs_pulse; /* If set, sets and clears START bit (pulse) */ }; /* c_can private data structure */ diff --git a/drivers/net/can/c_can/c_can_platform.c b/drivers/net/can/c_can/c_can_platform.c index fb0c35b..5ae9eb3 100644 --- a/drivers/net/can/c_can/c_can_platform.c +++ b/drivers/net/can/c_can/c_can_platform.c @@ -120,6 +120,12 @@ static void c_can_hw_raminit_syscon(const struct c_can_priv *priv, bool enable) ctrl |= 1 << raminit->start_bit; regmap_write(raminit->syscon, raminit->reg, ctrl); + /* clear START bit if start pulse is needed */ + if (raminit->needs_pulse) { + ctrl &= ~(1 << raminit->start_bit); + regmap_write(raminit->syscon, raminit->reg, ctrl); + } + ctrl |= 1 << raminit->done_bit; c_can_hw_raminit_wait_syscon(priv, mask, ctrl); } @@ -340,6 +346,8 @@ static int c_can_plat_probe(struct platform_device *pdev) } priv->raminit_sys.done_bit = val; + priv->raminit_sys.needs_pulse = of_property_read_bool(np, + "ti,raminit-pulse"); priv->raminit = c_can_hw_raminit_syscon; break; default: