From patchwork Mon Jun 30 01:35:24 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vince Bridgers X-Patchwork-Id: 365474 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 7A6BC1400F3 for ; Mon, 30 Jun 2014 11:39:25 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753903AbaF3BjX (ORCPT ); Sun, 29 Jun 2014 21:39:23 -0400 Received: from mail-oa0-f46.google.com ([209.85.219.46]:43094 "EHLO mail-oa0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753886AbaF3BjU (ORCPT ); Sun, 29 Jun 2014 21:39:20 -0400 Received: by mail-oa0-f46.google.com with SMTP id m1so7980965oag.5 for ; Sun, 29 Jun 2014 18:39:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=kr4CFgHd8rX569gqkW4Z2IASKdYYwjlv54IEzmNCSAo=; b=eE5/VsA1+r7RHzvgzUIDppQD+z7jTwIW/DRlIo2bSCNZFt2awP1rhuswX++8X1rlOL PQ7JNXzuK2kBFanFmHfrJWerRgCBNE9P3hDq9tMMlNb3SmZkJGAF+I38n0dW9YXwDN7n 4PC5yyCeqcNR+WLgIHr+KiF0tB21Qxn6JxGGYmhBkzoa05VPPWTuIjYlqV2cLzt5j2V0 rzPRd5FNoUgFr/KrBlqEPyDmDcS+R2u2q48455PjFq2hvysXg12RCvoS30T18cO0BJJv 1Sj/GdCT+05Ctk0Gdlw3UZmRovUUItB6qGWWgA42LHuowvoEl7cJnLBNmIQHIYdEZe12 SqfQ== X-Received: by 10.182.121.170 with SMTP id ll10mr39122371obb.58.1404092360291; Sun, 29 Jun 2014 18:39:20 -0700 (PDT) Received: from vince-Latitude-E6320.gateway.2wire.net (99-61-67-66.lightspeed.austtx.sbcglobal.net. [99.61.67.66]) by mx.google.com with ESMTPSA id db13sm65695421oec.15.2014.06.29.18.39.18 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sun, 29 Jun 2014 18:39:19 -0700 (PDT) From: Vince Bridgers To: f.fainelli@gmail.com, rdunlap@infradead.org, davem@davemloft.net, netdev@vger.kernel.org Cc: vbridgers2013@gmail.com, vbridger@altera.com Subject: [PATCH net v4 3/3] Documentation: networking: phy.txt: Update text for indirect MMD access Date: Sun, 29 Jun 2014 20:35:24 -0500 Message-Id: <1404092124-18704-4-git-send-email-vbridgers2013@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1404092124-18704-1-git-send-email-vbridgers2013@gmail.com> References: <1404092124-18704-1-git-send-email-vbridgers2013@gmail.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Update the PHY library documentation to describe how a specific PHY driver can use the PAL MMD register access routines or override those routines with it's own in the event the PHY does not support the IEEE standard for reading and writing MMD phy registers. Signed-off-by: Vince Bridgers Reviewed-by: Florian Fainelli --- V4: None V3: Add modified Documentation/networking/phy.txt per review comments. --- Documentation/networking/phy.txt | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/Documentation/networking/phy.txt b/Documentation/networking/phy.txt index 3544c98..326836a 100644 --- a/Documentation/networking/phy.txt +++ b/Documentation/networking/phy.txt @@ -272,6 +272,8 @@ Writing a PHY driver txtsamp: Requests a transmit timestamp at the PHY level for a 'skb' set_wol: Enable Wake-on-LAN at the PHY level get_wol: Get the Wake-on-LAN status at the PHY level + rd_mmd_indirect: Read PHY MMD indirect register + wr_mmd_indirect: Write PHY MMD indirect register Of these, only config_aneg and read_status are required to be assigned by the driver code. The rest are optional. Also, it is @@ -284,7 +286,21 @@ Writing a PHY driver Feel free to look at the Marvell, Cicada, and Davicom drivers in drivers/net/phy/ for examples (the lxt and qsemi drivers have - not been tested as of this writing) + not been tested as of this writing). + + The PHY's MMD register accesses are handled by the PAL framework + by default, but can be overridden by a specific PHY driver if + required. This could be the case if a PHY was released for + manufacturing before the MMD PHY register definitions were + standardized by the IEEE. Most modern PHYs will be able to use + the generic PAL framework for accessing the PHY's MMD registers. + An example of such usage is for Energy Efficient Ethernet support, + implemented in the PAL. This support uses the PAL to access MMD + registers for EEE query and configuration if the PHY supports + the IEEE standard access mechanisms, or can use the PHY's specific + access interfaces if overridden by the specific PHY driver. See + the Micrel driver in drivers/net/phy/ for an example of how this + can be implemented. Board Fixups