From patchwork Fri Jun 27 10:05:30 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?S=C3=B8rensen=2C_Stefan?= X-Patchwork-Id: 364861 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3743F1400D2 for ; Fri, 27 Jun 2014 20:06:24 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753231AbaF0KGG (ORCPT ); Fri, 27 Jun 2014 06:06:06 -0400 Received: from 213083164162.static.sonofon.dk ([213.83.164.162]:52645 "EHLO HORWDSPRD01.spectralink.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753158AbaF0KGE (ORCPT ); Fri, 27 Jun 2014 06:06:04 -0400 Received: from e37108.spectralink.com ([172.29.194.128]) by HORWDSPRD01.spectralink.com with Microsoft SMTPSVC(7.5.7600.16601); Fri, 27 Jun 2014 12:06:02 +0200 Received: by e37108.spectralink.com (sSMTP sendmail emulation); Fri, 27 Jun 2014 12:06:01 +0200 From: =?UTF-8?q?Stefan=20S=C3=B8rensen?= To: davem@davemloft.net, richardcochran@gmail.com Cc: netdev@vger.kernel.org, =?UTF-8?q?Stefan=20S=C3=B8rensen?= Subject: [PATCH net-next v2 2/5] dp83640: Increase supported perout pins to 7 Date: Fri, 27 Jun 2014 12:05:30 +0200 Message-Id: <1403863533-27675-3-git-send-email-stefan.sorensen@spectralink.com> X-Mailer: git-send-email 1.9.3 In-Reply-To: <1403863533-27675-1-git-send-email-stefan.sorensen@spectralink.com> References: <1403863533-27675-1-git-send-email-stefan.sorensen@spectralink.com> MIME-Version: 1.0 X-OriginalArrivalTime: 27 Jun 2014 10:06:02.0265 (UTC) FILETIME=[66A9D090:01CF91EF] Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org This patch increases the number of supported periodic output pins from 1 to 7. The last pin is reserved for sync. Signed-off-by: Stefan Sørensen --- drivers/net/phy/dp83640.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/net/phy/dp83640.c b/drivers/net/phy/dp83640.c index fcd50b77..eabecff 100644 --- a/drivers/net/phy/dp83640.c +++ b/drivers/net/phy/dp83640.c @@ -40,6 +40,7 @@ #define LAYER2 0x01 #define MAX_RXTS 64 #define N_EXT_TS 6 +#define N_PER_OUT 7 #define PSF_PTPVER 2 #define PSF_EVNT 0x4000 #define PSF_RX 0x2000 @@ -47,7 +48,6 @@ #define EXT_EVENT 1 #define CAL_EVENT 7 #define CAL_TRIGGER 7 -#define PER_TRIGGER 6 #define DP83640_N_PINS 12 #define MII_DP83640_MICR 0x11 @@ -300,23 +300,23 @@ static u64 phy2txts(struct phy_txts *p) } static int periodic_output(struct dp83640_clock *clock, - struct ptp_clock_request *clkreq, bool on) + struct ptp_clock_request *clkreq, bool on, + int trigger) { struct dp83640_private *dp83640 = clock->chosen; struct phy_device *phydev = dp83640->phydev; u32 sec, nsec, pwidth; - u16 gpio, ptp_trig, trigger, val; + u16 gpio, ptp_trig, val; if (on) { - gpio = 1 + ptp_find_pin(clock->ptp_clock, PTP_PF_PEROUT, 0); + gpio = 1 + ptp_find_pin(clock->ptp_clock, PTP_PF_PEROUT, + trigger); if (gpio < 1) return -EINVAL; } else { gpio = 0; } - trigger = PER_TRIGGER; - ptp_trig = TRIG_WR | (trigger & TRIG_CSEL_MASK) << TRIG_CSEL_SHIFT | (gpio & TRIG_GPIO_MASK) << TRIG_GPIO_SHIFT | @@ -496,9 +496,9 @@ static int ptp_dp83640_enable(struct ptp_clock_info *ptp, return 0; case PTP_CLK_REQ_PEROUT: - if (rq->perout.index != 0) + if (rq->perout.index >= N_PER_OUT) return -EINVAL; - return periodic_output(clock, rq, on); + return periodic_output(clock, rq, on, rq->perout.index); default: break; @@ -949,7 +949,7 @@ static void dp83640_clock_init(struct dp83640_clock *clock, struct mii_bus *bus) clock->caps.max_adj = 1953124; clock->caps.n_alarm = 0; clock->caps.n_ext_ts = N_EXT_TS; - clock->caps.n_per_out = 1; + clock->caps.n_per_out = N_PER_OUT; clock->caps.n_pins = DP83640_N_PINS; clock->caps.pps = 0; clock->caps.adjfreq = ptp_dp83640_adjfreq;