From patchwork Thu Jun 26 17:06:45 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 364614 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 588921400D3 for ; Fri, 27 Jun 2014 03:07:51 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758330AbaFZRHo (ORCPT ); Thu, 26 Jun 2014 13:07:44 -0400 Received: from mail-pb0-f42.google.com ([209.85.160.42]:43916 "EHLO mail-pb0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756633AbaFZRH1 (ORCPT ); Thu, 26 Jun 2014 13:07:27 -0400 Received: by mail-pb0-f42.google.com with SMTP id ma3so3398661pbc.15 for ; Thu, 26 Jun 2014 10:07:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=YO7yqZqX5tT1s3H/LYkWmO1l2ItGAdVlbEM3clmWM5o=; b=sa21r5iW+VvV562DMtmCjhxy6O0Ev8ASGzk6wonCU/7lZtdYGXDN9/Ll4NV2VV6Htc 532fvMZzj4er5/ahrxisufuxJBJusaGLbI7aGByHphYjJagZ8YVvRwj/bT2aQZ3Rjk+7 8hHp95jIQ+BlE5Hbz0DXDyShNt6YLc0A8rBebSrVemzmkx1h0gWLQwgVbJ/xUIDgO5hY NjXaaUZDZJhbMBzrAFF5fNAFjX/MZfeZX1LQ9AkBxkFzPlzif57cLLcrjPBSWOi3T5HL 2YkQNd90uzMh7sFZs/1DiVVJxZPeOcTfdU4jRkiay0ggJ60oCYii4+j5bLuK8y5ghJC6 WuFg== X-Received: by 10.68.130.38 with SMTP id ob6mr22842647pbb.141.1403802447379; Thu, 26 Jun 2014 10:07:27 -0700 (PDT) Received: from fainelli-desktop.broadcom.com (5520-maca-inet1-outside.broadcom.com. [216.31.211.11]) by mx.google.com with ESMTPSA id qf10sm10917043pbc.23.2014.06.26.10.07.26 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 26 Jun 2014 10:07:26 -0700 (PDT) From: Florian Fainelli To: netdev@vger.kernel.org Cc: davem@davemloft.net, Florian Fainelli Subject: [PATCH net v2 2/3] net: systemport: fix UniMAC reset logic Date: Thu, 26 Jun 2014 10:06:45 -0700 Message-Id: <1403802406-10992-3-git-send-email-f.fainelli@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1403802406-10992-1-git-send-email-f.fainelli@gmail.com> References: <1403802406-10992-1-git-send-email-f.fainelli@gmail.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The UniMAC CMD_SW_RESET bit is not a self-clearing bit, so we need to assert it, wait a bit and clear it manually. As a result, umac_reset() is updated not to return any value. The previous version of the code simply wrote 0 to the CMD register, which would make the busy-waiting loop exit immediately, having zero effect. By writing 0 to the CMD register, we were clearing all bits in the CMD register, and not using the hardware reset default values which are set on purpose. Signed-off-by: Florian Fainelli --- Changes in v2: - clarify the commit message and make it accurate with what the code did before drivers/net/ethernet/broadcom/bcmsysport.c | 33 ++++++++---------------------- 1 file changed, 9 insertions(+), 24 deletions(-) diff --git a/drivers/net/ethernet/broadcom/bcmsysport.c b/drivers/net/ethernet/broadcom/bcmsysport.c index f6bccd847ee6..d31f7d239064 100644 --- a/drivers/net/ethernet/broadcom/bcmsysport.c +++ b/drivers/net/ethernet/broadcom/bcmsysport.c @@ -1254,28 +1254,17 @@ static inline void umac_enable_set(struct bcm_sysport_priv *priv, usleep_range(1000, 2000); } -static inline int umac_reset(struct bcm_sysport_priv *priv) +static inline void umac_reset(struct bcm_sysport_priv *priv) { - unsigned int timeout = 0; u32 reg; - int ret = 0; - - umac_writel(priv, 0, UMAC_CMD); - while (timeout++ < 1000) { - reg = umac_readl(priv, UMAC_CMD); - if (!(reg & CMD_SW_RESET)) - break; - - udelay(1); - } - - if (timeout == 1000) { - dev_err(&priv->pdev->dev, - "timeout waiting for MAC to come out of reset\n"); - ret = -ETIMEDOUT; - } - return ret; + reg = umac_readl(priv, UMAC_CMD); + reg |= CMD_SW_RESET; + umac_writel(priv, reg, UMAC_CMD); + udelay(10); + reg = umac_readl(priv, UMAC_CMD); + reg &= ~CMD_SW_RESET; + umac_writel(priv, reg, UMAC_CMD); } static void umac_set_hw_addr(struct bcm_sysport_priv *priv, @@ -1303,11 +1292,7 @@ static int bcm_sysport_open(struct net_device *dev) int ret; /* Reset UniMAC */ - ret = umac_reset(priv); - if (ret) { - netdev_err(dev, "UniMAC reset failed\n"); - return ret; - } + umac_reset(priv); /* Flush TX and RX FIFOs at TOPCTRL level */ topctrl_flush(priv);