From patchwork Sun Jan 5 10:46:57 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kirsher, Jeffrey T" X-Patchwork-Id: 306948 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id CA57F2C00BD for ; Sun, 5 Jan 2014 21:47:57 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751294AbaAEKrx (ORCPT ); Sun, 5 Jan 2014 05:47:53 -0500 Received: from mga02.intel.com ([134.134.136.20]:26680 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751093AbaAEKrN (ORCPT ); Sun, 5 Jan 2014 05:47:13 -0500 Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP; 05 Jan 2014 02:47:12 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.95,607,1384329600"; d="scan'208";a="434089985" Received: from unknown (HELO jtkirshe-mobl.amr.corp.intel.com) ([10.255.15.232]) by orsmga001.jf.intel.com with ESMTP; 05 Jan 2014 02:47:11 -0800 From: Jeff Kirsher To: davem@davemloft.net Cc: Mitch Williams , netdev@vger.kernel.org, gospo@redhat.com, sassmann@redhat.com, Jesse Brandeburg , Jeff Kirsher Subject: [net-next 05/15] i40e: guard against vf message races Date: Sun, 5 Jan 2014 02:46:57 -0800 Message-Id: <1388918827-13430-6-git-send-email-jeffrey.t.kirsher@intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1388918827-13430-1-git-send-email-jeffrey.t.kirsher@intel.com> References: <1388918827-13430-1-git-send-email-jeffrey.t.kirsher@intel.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: Mitch Williams When disabling and enabling VFs on a live system with the VF driver loaded, it's possible to receive an admin queue message from the VF driver at an inconvenient time, e.g. when the associated data structures aren't present or configured. This causes a rather inconvenient panic. To guard against this, we change the order of when we set num_alloc_vfs when turning off SR-IOV, and then gate processing of any VF messages based upon that value. Likewise, when enabling VFs, we shut off the relevant interrupt until configuration is complete. Change-Id: I0c172c056616c2bebd78bbc807ab446eb484deea Signed-off-by: Mitch Williams Signed-off-by: Jesse Brandeburg Tested-by: Sibai Li Tested-by: Kavindya Deegala Signed-off-by: Jeff Kirsher --- drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c | 23 +++++++++++++++++----- 1 file changed, 18 insertions(+), 5 deletions(-) diff --git a/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c b/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c index cc4ebf5..ed25fcb 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c +++ b/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c @@ -720,7 +720,7 @@ static bool i40e_vfs_are_assigned(struct i40e_pf *pf) void i40e_free_vfs(struct i40e_pf *pf) { struct i40e_hw *hw = &pf->hw; - int i; + int i, tmp; if (!pf->vf) return; @@ -728,9 +728,11 @@ void i40e_free_vfs(struct i40e_pf *pf) /* Disable interrupt 0 so we don't try to handle the VFLR. */ wr32(hw, I40E_PFINT_DYN_CTL0, 0); i40e_flush(hw); - + mdelay(10); /* let any messages in transit get finished up */ /* free up vf resources */ - for (i = 0; i < pf->num_alloc_vfs; i++) { + tmp = pf->num_alloc_vfs; + pf->num_alloc_vfs = 0; + for (i = 0; i < tmp; i++) { if (test_bit(I40E_VF_STAT_INIT, &pf->vf[i].vf_states)) i40e_free_vf_res(&pf->vf[i]); /* disable qp mappings */ @@ -739,7 +741,6 @@ void i40e_free_vfs(struct i40e_pf *pf) kfree(pf->vf); pf->vf = NULL; - pf->num_alloc_vfs = 0; if (!i40e_vfs_are_assigned(pf)) pci_disable_sriov(pf->pdev); @@ -765,9 +766,13 @@ void i40e_free_vfs(struct i40e_pf *pf) **/ static int i40e_alloc_vfs(struct i40e_pf *pf, u16 num_alloc_vfs) { + struct i40e_hw *hw = &pf->hw; struct i40e_vf *vfs; int i, ret = 0; + /* Disable interrupt 0 so we don't try to handle the VFLR. */ + wr32(hw, I40E_PFINT_DYN_CTL0, 0); + i40e_flush(hw); ret = pci_enable_sriov(pf->pdev, num_alloc_vfs); if (ret) { dev_err(&pf->pdev->dev, @@ -804,6 +809,11 @@ err_alloc: if (ret) i40e_free_vfs(pf); err_iov: + /* Re-enable interrupt 0. */ + wr32(hw, I40E_PFINT_DYN_CTL0, + I40E_PFINT_DYN_CTL0_INTENA_MASK | + I40E_PFINT_DYN_CTL0_CLEARPBA_MASK | + (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT)); return ret; } @@ -1644,11 +1654,14 @@ static int i40e_vc_validate_vf_msg(struct i40e_vf *vf, u32 v_opcode, int i40e_vc_process_vf_msg(struct i40e_pf *pf, u16 vf_id, u32 v_opcode, u32 v_retval, u8 *msg, u16 msglen) { - struct i40e_vf *vf = &(pf->vf[vf_id]); struct i40e_hw *hw = &pf->hw; + struct i40e_vf *vf; int ret; pf->vf_aq_requests++; + if (vf_id >= pf->num_alloc_vfs) + return -EINVAL; + vf = &(pf->vf[vf_id]); /* perform basic checks on the msg */ ret = i40e_vc_validate_vf_msg(vf, v_opcode, v_retval, msg, msglen);