From patchwork Sun Sep 8 11:23:58 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mugunthan V N X-Patchwork-Id: 273431 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 418AB2C011D for ; Sun, 8 Sep 2013 21:24:38 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754209Ab3IHLYf (ORCPT ); Sun, 8 Sep 2013 07:24:35 -0400 Received: from bear.ext.ti.com ([192.94.94.41]:41039 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752471Ab3IHLYd (ORCPT ); Sun, 8 Sep 2013 07:24:33 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id r88BORwK017177; Sun, 8 Sep 2013 06:24:27 -0500 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id r88BOR18000762; Sun, 8 Sep 2013 06:24:27 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.2.342.3; Sun, 8 Sep 2013 06:24:26 -0500 Received: from mugunthan-lt.itg.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id r88BO1fM021323; Sun, 8 Sep 2013 06:24:23 -0500 From: Mugunthan V N To: CC: , , , , , , Mugunthan V N Subject: [RFC PATCH 4/4] ARM: dts: am33xx: adopt to cpsw-phy-sel driver to configure phy mode Date: Sun, 8 Sep 2013 16:53:58 +0530 Message-ID: <1378639438-27686-5-git-send-email-mugunthanvnm@ti.com> X-Mailer: git-send-email 1.8.4 In-Reply-To: <1378639438-27686-1-git-send-email-mugunthanvnm@ti.com> References: <1378639438-27686-1-git-send-email-mugunthanvnm@ti.com> MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Add DT entries for the phy mode selection in AM33xx SoC using cpsw-phy-sel driver. Signed-off-by: Mugunthan V N --- arch/arm/boot/dts/am33xx.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index f9c5da9..4359672 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -594,6 +594,12 @@ /* Filled in by U-Boot */ mac-address = [ 00 00 00 00 00 00 ]; }; + + phy_sel: cpsw_phy_sel@44e10650 { + compatible = "ti,am3352-cpsw-phy-sel"; + reg= <0x44e10650 0x4>; + reg-names = "gmii-sel"; + }; }; ocmcram: ocmcram@40300000 {