From patchwork Wed Aug 8 12:26:47 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Manoil X-Patchwork-Id: 175919 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id A363D2C009E for ; Wed, 8 Aug 2012 22:27:16 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758071Ab2HHM1F (ORCPT ); Wed, 8 Aug 2012 08:27:05 -0400 Received: from va3ehsobe006.messaging.microsoft.com ([216.32.180.16]:28076 "EHLO va3outboundpool.messaging.microsoft.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753563Ab2HHM1C (ORCPT ); Wed, 8 Aug 2012 08:27:02 -0400 Received: from mail77-va3-R.bigfish.com (10.7.14.240) by VA3EHSOBE002.bigfish.com (10.7.40.22) with Microsoft SMTP Server id 14.1.225.23; Wed, 8 Aug 2012 12:27:00 +0000 Received: from mail77-va3 (localhost [127.0.0.1]) by mail77-va3-R.bigfish.com (Postfix) with ESMTP id 7A61D4C02EC; Wed, 8 Aug 2012 12:27:00 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 0 X-BigFish: VS0(zzzz1202hzz8275bhz2dh2a8h668h839hd24he5bhf0ah) Received: from mail77-va3 (localhost.localdomain [127.0.0.1]) by mail77-va3 (MessageSwitch) id 1344428816806026_4596; Wed, 8 Aug 2012 12:26:56 +0000 (UTC) Received: from VA3EHSMHS006.bigfish.com (unknown [10.7.14.238]) by mail77-va3.bigfish.com (Postfix) with ESMTP id B7C654A026C; Wed, 8 Aug 2012 12:26:56 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by VA3EHSMHS006.bigfish.com (10.7.99.16) with Microsoft SMTP Server (TLS) id 14.1.225.23; Wed, 8 Aug 2012 12:26:55 +0000 Received: from tx30smr01.am.freescale.net (10.81.153.31) by 039-SN1MMR1-005.039d.mgd.msft.net (10.84.1.17) with Microsoft SMTP Server (TLS) id 14.2.298.5; Wed, 8 Aug 2012 07:26:54 -0500 Received: from zro04cle141.ea.freescale.net (udp157456uds.ea.freescale.net [140.101.223.141]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id q78CQpQn012222; Wed, 8 Aug 2012 05:26:54 -0700 Received: by zro04cle141.ea.freescale.net (Postfix, from userid 23113) id EB39B4005C; Wed, 8 Aug 2012 15:26:50 +0300 (EEST) From: Claudiu Manoil To: CC: "David S. Miller" , Paul Gortmaker , Claudiu Manoil Subject: [RFC net-next 1/4] gianfar: Remove redundant programming of [rt]xic registers Date: Wed, 8 Aug 2012 15:26:47 +0300 Message-ID: <1344428810-29923-2-git-send-email-claudiu.manoil@freescale.com> X-Mailer: git-send-email 1.6.6 In-Reply-To: <1344428810-29923-1-git-send-email-claudiu.manoil@freescale.com> References: <1344428810-29923-1-git-send-email-claudiu.manoil@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.net Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org In Multi Q Multi Group (MQ_MG_MODE) mode, the Rx/Tx colescing registers [rt]xic are aliased with the [rt]xic0 registers (coalescing setting regs for Q0). This avoids programming twice in a row the coalescing registers for the Rx/Tx hw Q0. Also, replaced inconsistent "unlikely" in the process. Signed-off-by: Claudiu Manoil --- drivers/net/ethernet/freescale/gianfar.c | 24 ++++++++++++------------ 1 files changed, 12 insertions(+), 12 deletions(-) diff --git a/drivers/net/ethernet/freescale/gianfar.c b/drivers/net/ethernet/freescale/gianfar.c index 4605f72..e9feeb9 100644 --- a/drivers/net/ethernet/freescale/gianfar.c +++ b/drivers/net/ethernet/freescale/gianfar.c @@ -1799,20 +1799,9 @@ void gfar_configure_coalescing(struct gfar_private *priv, { struct gfar __iomem *regs = priv->gfargrp[0].regs; u32 __iomem *baddr; - int i = 0; - - /* Backward compatible case ---- even if we enable - * multiple queues, there's only single reg to program - */ - gfar_write(®s->txic, 0); - if (likely(priv->tx_queue[0]->txcoalescing)) - gfar_write(®s->txic, priv->tx_queue[0]->txic); - - gfar_write(®s->rxic, 0); - if (unlikely(priv->rx_queue[0]->rxcoalescing)) - gfar_write(®s->rxic, priv->rx_queue[0]->rxic); if (priv->mode == MQ_MG_MODE) { + int i; baddr = ®s->txic0; for_each_set_bit(i, &tx_mask, priv->num_tx_queues) { gfar_write(baddr + i, 0); @@ -1826,6 +1815,17 @@ void gfar_configure_coalescing(struct gfar_private *priv, if (likely(priv->rx_queue[i]->rxcoalescing)) gfar_write(baddr + i, priv->rx_queue[i]->rxic); } + } else { + /* Backward compatible case ---- even if we enable + * multiple queues, there's only single reg to program + */ + gfar_write(®s->txic, 0); + if (likely(priv->tx_queue[0]->txcoalescing)) + gfar_write(®s->txic, priv->tx_queue[0]->txic); + + gfar_write(®s->rxic, 0); + if (likely(priv->rx_queue[0]->rxcoalescing)) + gfar_write(®s->rxic, priv->rx_queue[0]->rxic); } }