From patchwork Thu Apr 19 08:01:25 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Huang, Xiong" X-Patchwork-Id: 153674 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id C2238B6F9A for ; Thu, 19 Apr 2012 18:04:26 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754512Ab2DSICg (ORCPT ); Thu, 19 Apr 2012 04:02:36 -0400 Received: from wolverine01.qualcomm.com ([199.106.114.254]:21475 "EHLO wolverine01.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753736Ab2DSIC2 (ORCPT ); Thu, 19 Apr 2012 04:02:28 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=qca.qualcomm.com; i=xiong@qca.qualcomm.com; q=dns/txt; s=qcdkim; t=1334822548; x=1366358548; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=5hr7Dia+gLxB/t2Kj9qEiKY0AzWlbG1qiaHdGjMqf5U=; b=jp2ogJaxLOS8fpQzE+buuISeauJy8ReUXvI9fF47nBnuCSxRqGkwtbR3 WY/VqAsAgfR2v0cJyv3RTJ05p8Mbu6SdOYAwHAXUgyEg27Rmv5DoF8bQO dRrpuZ389jY0U3fmj+DZg6qhwLNB75VPSzxJmTQjr1GuStxvDzpikJd3D Y=; X-IronPort-AV: E=McAfee;i="5400,1158,6685"; a="183042391" Received: from ironmsg04-l.qualcomm.com ([172.30.48.19]) by wolverine01.qualcomm.com with ESMTP; 19 Apr 2012 01:02:27 -0700 X-IronPort-AV: E=Sophos;i="4.75,445,1330934400"; d="scan'208";a="200014763" Received: from nasanexhc04.na.qualcomm.com ([172.30.48.17]) by Ironmsg04-L.qualcomm.com with ESMTP/TLS/AES128-SHA; 19 Apr 2012 01:02:20 -0700 Received: from qcmail1.qualcomm.com (172.30.48.1) by qcmail1.qualcomm.com (172.30.48.17) with Microsoft SMTP Server (TLS) id 14.2.283.3; Thu, 19 Apr 2012 01:02:18 -0700 Received: by qcmail1.qualcomm.com (sSMTP sendmail emulation); Thu, 19 Apr 2012 16:02:14 +0800 From: xiong To: , , CC: , , xiong Subject: [PATCH 05/11] atl1c: clear PCIE error status in atl1c_reset_pcie Date: Thu, 19 Apr 2012 16:01:25 +0800 Message-ID: <1334822491-30129-6-git-send-email-xiong@qca.qualcomm.com> X-Mailer: git-send-email 1.7.7 In-Reply-To: <1334822491-30129-1-git-send-email-xiong@qca.qualcomm.com> References: <1334822491-30129-1-git-send-email-xiong@qca.qualcomm.com> MIME-Version: 1.0 X-Originating-IP: [172.30.48.1] Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org clear PCIE error status (error log is write-1-clear). REG_PCIE_UC_SEVERITY is removed as it's a standard pcie register, and using kernle API to access it. Signed-off-by: xiong Tested-by: Liu David --- drivers/net/ethernet/atheros/atl1c/atl1c_hw.h | 13 ------------- drivers/net/ethernet/atheros/atl1c/atl1c_main.c | 15 +++++++++++---- 2 files changed, 11 insertions(+), 17 deletions(-) diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h b/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h index c9c6782..6d73ac9 100644 --- a/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h +++ b/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h @@ -61,19 +61,6 @@ int atl1c_phy_power_saving(struct atl1c_hw *hw); #define LINK_CTRL_L1_EN 0x02 #define LINK_CTRL_EXT_SYNC 0x80 -#define REG_PCIE_UC_SEVERITY 0x10C -#define PCIE_UC_SERVRITY_TRN 0x00000001 -#define PCIE_UC_SERVRITY_DLP 0x00000010 -#define PCIE_UC_SERVRITY_PSN_TLP 0x00001000 -#define PCIE_UC_SERVRITY_FCP 0x00002000 -#define PCIE_UC_SERVRITY_CPL_TO 0x00004000 -#define PCIE_UC_SERVRITY_CA 0x00008000 -#define PCIE_UC_SERVRITY_UC 0x00010000 -#define PCIE_UC_SERVRITY_ROV 0x00020000 -#define PCIE_UC_SERVRITY_MLFP 0x00040000 -#define PCIE_UC_SERVRITY_ECRC 0x00080000 -#define PCIE_UC_SERVRITY_UR 0x00100000 - #define REG_DEV_SERIALNUM_CTRL 0x200 #define REG_DEV_MAC_SEL_MASK 0x0 /* 0:EUI; 1:MAC */ #define REG_DEV_MAC_SEL_SHIFT 0 diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c index 12b4725..729381a 100644 --- a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c +++ b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c @@ -108,6 +108,7 @@ static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag) u32 data; u32 pci_cmd; struct pci_dev *pdev = hw->adapter->pdev; + int pos; AT_READ_REG(hw, PCI_COMMAND, &pci_cmd); pci_cmd &= ~PCI_COMMAND_INTX_DISABLE; @@ -124,10 +125,16 @@ static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag) /* * Mask some pcie error bits */ - AT_READ_REG(hw, REG_PCIE_UC_SEVERITY, &data); - data &= ~PCIE_UC_SERVRITY_DLP; - data &= ~PCIE_UC_SERVRITY_FCP; - AT_WRITE_REG(hw, REG_PCIE_UC_SEVERITY, data); + pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR); + pci_read_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, &data); + data &= ~(PCI_ERR_UNC_DLP | PCI_ERR_UNC_FCP); + pci_write_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, data); + /* clear error status */ + pci_write_config_word(pdev, pci_pcie_cap(pdev) + PCI_EXP_DEVSTA, + PCI_EXP_DEVSTA_NFED | + PCI_EXP_DEVSTA_FED | + PCI_EXP_DEVSTA_CED | + PCI_EXP_DEVSTA_URD); AT_READ_REG(hw, REG_LTSSM_ID_CTRL, &data); data &= ~LTSSM_ID_EN_WRO;