From patchwork Wed Apr 18 05:32:34 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Huang, Xiong" X-Patchwork-Id: 153388 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 8435AB6FAA for ; Wed, 18 Apr 2012 15:35:02 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752860Ab2DRFeV (ORCPT ); Wed, 18 Apr 2012 01:34:21 -0400 Received: from wolverine02.qualcomm.com ([199.106.114.251]:21715 "EHLO wolverine02.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751081Ab2DRFeR (ORCPT ); Wed, 18 Apr 2012 01:34:17 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=qca.qualcomm.com; i=xiong@qca.qualcomm.com; q=dns/txt; s=qcdkim; t=1334727257; x=1366263257; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=YORUbULf/N3ySyI7Y/pHB7kw4R0PU2WITNayOvPJ9pg=; b=nLBB3vN8se1vZ2OGbNNYmsFDOfBs9NvkrPRvKD2nFmobLCb/oJTLkQsH c3ehNPQStsDotZrqrwNq+cXLgILmAGx6qiwwH8maLWEHkkdB3P9RjpjCw AhOl8Xxx02EReq2RawjVDlXFY2AzjUCZ7g0MNxDozAafjhISVCrFJHQNT 4=; X-IronPort-AV: E=McAfee;i="5400,1158,6684"; a="180355853" Received: from ironmsg02-l.qualcomm.com ([172.30.48.16]) by wolverine02.qualcomm.com with ESMTP; 17 Apr 2012 22:34:16 -0700 X-IronPort-AV: E=Sophos;i="4.75,438,1330934400"; d="scan'208";a="120453691" Received: from nasanexhc08.na.qualcomm.com ([172.30.39.7]) by ironmsg02-L.qualcomm.com with ESMTP/TLS/AES128-SHA; 17 Apr 2012 22:34:16 -0700 Received: from qcmail1.qualcomm.com (172.30.39.5) by qcmail1.qualcomm.com (172.30.39.7) with Microsoft SMTP Server (TLS) id 14.2.283.3; Tue, 17 Apr 2012 22:34:15 -0700 Received: by qcmail1.qualcomm.com (sSMTP sendmail emulation); Wed, 18 Apr 2012 13:34:11 +0800 From: xiong To: , , CC: , , xiong Subject: [PATCH 10/12] atl1c: remove dmaw_block Date: Wed, 18 Apr 2012 13:32:34 +0800 Message-ID: <1334727156-6830-11-git-send-email-xiong@qca.qualcomm.com> X-Mailer: git-send-email 1.7.7 In-Reply-To: <1334727156-6830-1-git-send-email-xiong@qca.qualcomm.com> References: <1334727156-6830-1-git-send-email-xiong@qca.qualcomm.com> MIME-Version: 1.0 X-Originating-IP: [172.30.39.5] Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org dmaw_block is never used in the driver, remove it. Signed-off-by: xiong Tested-by: Liu David --- drivers/net/ethernet/atheros/atl1c/atl1c.h | 1 - drivers/net/ethernet/atheros/atl1c/atl1c_main.c | 4 ---- 2 files changed, 0 insertions(+), 5 deletions(-) diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c.h b/drivers/net/ethernet/atheros/atl1c/atl1c.h index 973c568..0a4bfab 100644 --- a/drivers/net/ethernet/atheros/atl1c/atl1c.h +++ b/drivers/net/ethernet/atheros/atl1c/atl1c.h @@ -374,7 +374,6 @@ struct atl1c_hw { enum atl1c_dma_order dma_order; enum atl1c_dma_rcb rcb_value; enum atl1c_dma_req_block dmar_block; - enum atl1c_dma_req_block dmaw_block; u16 device_id; u16 vendor_id; diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c index 1ce48d0..d6ebaa4 100644 --- a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c +++ b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c @@ -740,7 +740,6 @@ static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter) hw->rfd_burst = 8; hw->dma_order = atl1c_dma_ord_out; hw->dmar_block = atl1c_dma_req_1024; - hw->dmaw_block = atl1c_dma_req_1024; hw->dmar_dly_cnt = 15; hw->dmaw_dly_cnt = 4; @@ -1056,9 +1055,6 @@ static void atl1c_configure_tx(struct atl1c_adapter *adapter) AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH, (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK); AT_READ_REG(hw, REG_DEVICE_CTRL, &dev_ctrl_data); - max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT) & - DEVICE_CTRL_MAX_PAYLOAD_MASK; - hw->dmaw_block = min_t(u32, max_pay_load, hw->dmaw_block); max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT) & DEVICE_CTRL_MAX_RREQ_SZ_MASK; hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block);