From patchwork Sat Feb 13 00:47:08 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matt Carlson X-Patchwork-Id: 45226 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 2852CB7CB9 for ; Sat, 13 Feb 2010 11:47:59 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757289Ab0BMAro (ORCPT ); Fri, 12 Feb 2010 19:47:44 -0500 Received: from mms3.broadcom.com ([216.31.210.19]:1322 "EHLO MMS3.broadcom.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757221Ab0BMArk (ORCPT ); Fri, 12 Feb 2010 19:47:40 -0500 Received: from [10.9.200.131] by MMS3.broadcom.com with ESMTP (Broadcom SMTP Relay (Email Firewall v6.3.2)); Fri, 12 Feb 2010 16:47:25 -0800 X-Server-Uuid: B55A25B1-5D7D-41F8-BC53-C57E7AD3C201 Received: from mail-irva-12.broadcom.com (10.11.16.101) by IRVEXCHHUB01.corp.ad.broadcom.com (10.9.200.131) with Microsoft SMTP Server id 8.2.213.0; Fri, 12 Feb 2010 16:47:25 -0800 Received: from xw6200 (mcarlson.broadcom.com [10.12.148.101]) by mail-irva-12.broadcom.com (Postfix) with ESMTP id D743F69CB1; Fri, 12 Feb 2010 16:47:23 -0800 (PST) From: "Matt Carlson" To: davem@davemloft.net cc: netdev@vger.kernel.org, andy@greyhouse.net, mcarlson@broadcom.com, "Benjamin Li" Subject: [PATCH 4/9] tg3: Fix 57765 A0 bootcode race condition Date: Fri, 12 Feb 2010 16:47:08 -0800 Message-ID: <1266022033-3546-5-git-send-email-mcarlson@broadcom.com> X-Mailer: git-send-email 1.6.4.4 MIME-Version: 1.0 X-WSS-ID: 676B291731G27256849-01-01 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On A0 revision of 57765 asic rev devices, the bootcode will perform some hardware operations, after the magic signature is presented, that will collide with setup operations performed by the driver. The best way to avoid the contention is to have the driver delay an additional 10 milliseconds. B0 revisions of the chip will make this workaround unnecessary. Signed-off-by: Matt Carlson Signed-off-by: Benjamin Li Reviewed-by: Michael Chan --- drivers/net/tg3.c | 7 +++++++ drivers/net/tg3.h | 1 + 2 files changed, 8 insertions(+), 0 deletions(-) diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index e6ee291..d1452d3 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c @@ -6721,6 +6721,13 @@ static int tg3_poll_fw(struct tg3 *tp) tp->dev->name); } + if (tp->pci_chip_rev_id == CHIPREV_ID_57765_A0) { + /* The 57765 A0 needs a little more + * time to do some important work. + */ + mdelay(10); + } + return 0; } diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h index cc8bf7d..46db4ad 100644 --- a/drivers/net/tg3.h +++ b/drivers/net/tg3.h @@ -110,6 +110,7 @@ #define CHIPREV_ID_57780_A0 0x57780000 #define CHIPREV_ID_57780_A1 0x57780001 #define CHIPREV_ID_5717_A0 0x05717000 +#define CHIPREV_ID_57765_A0 0x57785000 #define GET_ASIC_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 12) #define ASIC_REV_5700 0x07 #define ASIC_REV_5701 0x00