From patchwork Thu Sep 4 14:03:45 2008 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Josh Boyer X-Patchwork-Id: 209 X-Patchwork-Delegate: jwboyer@gmail.com Return-Path: X-Original-To: patchwork@ozlabs.org Delivered-To: patchwork@ozlabs.org Received: from ozlabs.org (localhost [127.0.0.1]) by ozlabs.org (Postfix) with ESMTP id 5F2E7DE296 for ; Mon, 8 Sep 2008 23:05:24 +1000 (EST) X-Original-To: linuxppc-dev@ozlabs.org Delivered-To: linuxppc-dev@ozlabs.org Received: from py-out-1112.google.com (py-out-1112.google.com [64.233.166.182]) by ozlabs.org (Postfix) with ESMTP id C314ADDED8 for ; Mon, 8 Sep 2008 23:04:38 +1000 (EST) Received: by py-out-1112.google.com with SMTP id a29so928314pyi.27 for ; Mon, 08 Sep 2008 06:04:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:message-id:in-reply-to :references:from:date:subject:to:cc:mime-version:x-mailer :content-transfer-encoding:sender; bh=zcWwsrWosjifIR/uuevmM4QDAcSurwyTVF/OZuYhR48=; b=Muh3gQNfxU3AQZnR0/QBK7aKrx/NHAZlnslifmL4b7TJ5lnJg5sJyJSivvhEpwVgO7 3REMzFYP6ChhTc3vcSuWSRVPlfreqHVz7Sxue7n3gAhfMg1QfB4RN0pcthmgY1nw4YNs 2OPuO7vFfzcln8o7u5oe/mnTJ15ByTUpvAXBU= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=message-id:in-reply-to:references:from:date:subject:to:cc :mime-version:x-mailer:content-transfer-encoding:sender; b=Zjj8NF6K4DqvjHMWufioLtb2KO1/3vG8c5qv0Pm1B32/xEqSTI5K0fEApfE40BWP6g EEEwudsB/VpAuLJ52wGhmAHfWRFHCilRyFozDprlYjC0TRpY/rZoDM1s+4aZIgHvoMj7 lkpsq/JfMJbaCfLtDxKBGFR7L7ibyip+E8CvI= Received: by 10.65.116.10 with SMTP id t10mr31356337qbm.68.1220879077086; Mon, 08 Sep 2008 06:04:37 -0700 (PDT) Received: from ?192.168.1.101? ( [24.247.237.59]) by mx.google.com with ESMTPS id k7sm5548151qba.3.2008.09.08.06.04.35 (version=TLSv1/SSLv3 cipher=RC4-MD5); Mon, 08 Sep 2008 06:04:36 -0700 (PDT) Message-Id: In-Reply-To: References: From: Josh Boyer Date: Thu, 4 Sep 2008 10:03:45 -0400 Subject: [PATCH 2/3 v2] ibm_newemac: Introduce mal_has_feature To: benh@kernel.crashing.org, netdev@vger.kernel.org Mime-Version: 1.0 X-Mailer: Evolution 2.22.3.1 (2.22.3.1-1.fc9) Cc: linuxppc-dev@ozlabs.org X-BeenThere: linuxppc-dev@ozlabs.org X-Mailman-Version: 2.1.11 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linuxppc-dev-bounces+patchwork=ozlabs.org@ozlabs.org Errors-To: linuxppc-dev-bounces+patchwork=ozlabs.org@ozlabs.org There are some PowerPC SoCs that do odd things with the MAL handling. In order to accommodate them, we need to introduce a feature mechanism that is similar to the existing emac_has_feature function. This adds a feature variable to the mal_instance structure, and adds a mal_has_feature function. Two features are defined and are guarded by Kconfig options that are selected by the affected platforms. MAL_FTR_CLEAR_ICINSTAT is used for platforms that need to clear the interrupt bits in the ICINTSTAT SDR for txeob/rxeob. This is common on MAL implementations that have interrupt coalescing. MAL_FTR_COMMON_ERR_INT is used for platforms that have SERR, TXDE, and RXDE OR'd into a single interrupt bit. Signed-of-by: Josh Boyer diff --git a/drivers/net/ibm_newemac/Kconfig b/drivers/net/ibm_newemac/Kconfig index dfb6547..44e5a0e 100644 --- a/drivers/net/ibm_newemac/Kconfig +++ b/drivers/net/ibm_newemac/Kconfig @@ -66,3 +66,11 @@ config IBM_NEW_EMAC_EMAC4 config IBM_NEW_EMAC_NO_FLOW_CTRL bool default n + +config IBM_NEW_EMAC_MAL_CLR_ICINTSTAT + bool + default n + +config IBM_NEW_EMAC_MAL_COMMON_ERR + bool + default n diff --git a/drivers/net/ibm_newemac/mal.h b/drivers/net/ibm_newemac/mal.h index eaa7262..0b24138 100644 --- a/drivers/net/ibm_newemac/mal.h +++ b/drivers/net/ibm_newemac/mal.h @@ -213,6 +213,8 @@ struct mal_instance { struct of_device *ofdev; int index; spinlock_t lock; + + unsigned int features; }; static inline u32 get_mal_dcrn(struct mal_instance *mal, int reg) @@ -225,6 +227,38 @@ static inline void set_mal_dcrn(struct mal_instance *mal, int reg, u32 val) dcr_write(mal->dcr_host, reg, val); } +/* Features of various MAL implementations */ + +/* Set if you have interrupt coalescing and you have to clear the SDR + * register for TXEOB and RXEOB interrupts to work + */ +#define MAL_FTR_CLEAR_ICINTSTAT 0x00000001 + +/* Set if your MAL has SERR, TXDE, and RXDE OR'd into a single UIC + * interrupt + */ +#define MAL_FTR_COMMON_ERR_INT 0x00000002 + +enum { + MAL_FTRS_ALWAYS = 0, + + MAL_FTRS_POSSIBLE = +#ifdef CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT + MAL_FTR_CLEAR_ICINTSTAT | +#endif +#ifdef CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR + MAL_FTR_COMMON_ERR_INT | +#endif + 0, +}; + +static inline int mal_has_feature(struct mal_instance *dev, + unsigned long feature) +{ + return (MAL_FTRS_ALWAYS & feature) || + (MAL_FTRS_POSSIBLE & dev->features & feature); +} + /* Register MAL devices */ int mal_init(void); void mal_exit(void);