Message ID | 6241.1305847001@neuling.org (mailing list archive) |
---|---|
State | Not Applicable |
Headers | show |
On Thu, May 19, 2011 at 6:16 PM, Michael Neuling <mikey@neuling.org> wrote: > In message <BANLkTi=rc5vZm3xAXHpHSxSH1wBWKhv92A@mail.gmail.com> you wrote: >> On Thu, May 19, 2011 at 4:36 PM, Michael Neuling <mikey@neuling.org> wrote: >> > In message <BANLkTimKhApFW8G1-pG0u_9Kv2YB0R1O0w@mail.gmail.com> you wrote= >> : >> >> On Thu, May 19, 2011 at 12:58 AM, Michael Neuling <mikey@neuling.org> wr= >> ote=3D >> >> : >> >> > Eric, >> >> > >> >> >> This patch adds save/restore register support for the BlueGene/P >> >> >> double hummer FPU. >> >> > >> >> > What does this mean? =3DA0Needs more details here. >> >> > >> >> okay, I've changed it a bit in [V2], if you want more I can do my best. > > If you can describe the whole primary and secondary registers that'd be > cool. ASCII art would be awesome! :-) > You sure you don't just want a bitfield.conf? :) I'll do my best, but my ASCII art isn't what it used to be. I'll also include a reference to the PDF. >> > >> > Ok, sounds like there is 32*8*2 bytes of data, rather than the normal >> > 32*8 bytes for FP only (ignoring VSX). =A0If this is the case, then you'l= >> l >> > need make 'fpr' in the thread struct bigger which you can do by setting >> > TS_FPRWIDTH =3D 2 like we do for VSX. >> > Okay - so basically what I have now and TS_FPRWIDTH=2 ? >> >> Since it isn't available on other chips, shoudl it just be PPC_BGP_FPU >> or PPC_BGP_DOUBLE_FPU? > > I'd probably still prefer it disassociated with the CPU name, but we are > really bike shedding here. I'm not too fussed. > I'll leave it separate and switch it to PPC_FP2 (or would you prefer PPC_FP2_FPU to make it clear) since the public PDF refers to it this way. If that all sounds good, I'll spin [V3] tomorrow. -eric
> >> >> > Eric, > >> >> > > >> >> >> This patch adds save/restore register support for the BlueGene/P > >> >> >> double hummer FPU. > >> >> > > >> >> > What does this mean? =3DA0Needs more details here. > >> >> > > >> > >> okay, I've changed it a bit in [V2], if you want more I can do my best. > > > > If you can describe the whole primary and secondary registers that'd be > > cool. =A0ASCII art would be awesome! :-) > > > > You sure you don't just want a bitfield.conf? :) hehe, maybe an interpretive dance video posted on youtube? > I'll do my best, but my ASCII art isn't what it used to be. I'll also > include a reference to the PDF. Something self contained in the comments would be great as external links tend to disappear. > >> > Ok, sounds like there is 32*8*2 bytes of data, rather than the normal > >> > 32*8 bytes for FP only (ignoring VSX). If this is the case, then you'll > >> > need make 'fpr' in the thread struct bigger which you can do by setting > >> > TS_FPRWIDTH = 2 like we do for VSX. > >> > > > Okay - so basically what I have now and TS_FPRWIDTH=2 ? Yes. > >> > >> Since it isn't available on other chips, shoudl it just be PPC_BGP_FPU > >> or PPC_BGP_DOUBLE_FPU? > > > > I'd probably still prefer it disassociated with the CPU name, but we are > > really bike shedding here. =A0I'm not too fussed. > > > > I'll leave it separate and switch it to PPC_FP2 (or would you prefer > PPC_FP2_FPU to make it clear) since the public PDF refers to it this > way. PPC_FPU_FP2 would be my vote. > If that all sounds good, I'll spin [V3] tomorrow. Thanks! Mikey
--- a/arch/powerpc/kernel/fpu.S +++ b/arch/powerpc/kernel/fpu.S @@ -51,6 +51,9 @@ _GLOBAL(load_up_fpu) toreal(r4) addi r4,r4,THREAD /* want last_task_used_math->thread */ SAVE_32FPRS(0, r4) +#ifdef CONFIG_DOUBLE_HUMMER + SAVE_32SFPRS(0, r10, r3) +#endif /* CONFIG_DOUBLE_HUMMER */ mffs fr0 stfd fr0,THREAD_FPSCR(r4) PPC_LL r5,PT_REGS(r4) @@ -78,6 +81,9 @@ _GLOBAL(load_up_fpu) lfd fr0,THREAD_FPSCR(r5) MTFSF_L(fr0) REST_32FPRS(0, r5) +#ifdef CONFIG_DOUBLE_HUMMER + REST_32SFPRS(0, r10, r5) +#endif /* CONFIG_DOUBLE_HUMMER */ REST uses r5 as the base in both cases (primary and secondary) which is good. SAVE uses r4 in the primary case and r3 in the secondary, which