From patchwork Wed Jan 6 09:58:07 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yongji Xie X-Patchwork-Id: 563736 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 9FD621402C0 for ; Wed, 6 Jan 2016 20:59:03 +1100 (AEDT) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 865BF1A184F for ; Wed, 6 Jan 2016 20:59:03 +1100 (AEDT) X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Received: from e28smtp01.in.ibm.com (e28smtp01.in.ibm.com [125.16.236.1]) (using TLSv1 with cipher CAMELLIA256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4BE651A11A9 for ; Wed, 6 Jan 2016 20:58:05 +1100 (AEDT) Received: from localhost by e28smtp01.in.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Wed, 6 Jan 2016 15:28:00 +0530 X-IBM-Helo: d28dlp03.in.ibm.com X-IBM-MailFrom: xyjxie@linux.vnet.ibm.com X-IBM-RcptTo: linuxppc-dev@lists.ozlabs.org Received: from d28relay04.in.ibm.com (d28relay04.in.ibm.com [9.184.220.61]) by d28dlp03.in.ibm.com (Postfix) with ESMTP id 548FF125805B for ; Wed, 6 Jan 2016 15:28:42 +0530 (IST) Received: from d28av01.in.ibm.com (d28av01.in.ibm.com [9.184.220.63]) by d28relay04.in.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id u069vwFd19136704 for ; Wed, 6 Jan 2016 15:27:59 +0530 Received: from d28av01.in.ibm.com (localhost [127.0.0.1]) by d28av01.in.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id u069vwlf007728 for ; Wed, 6 Jan 2016 15:27:58 +0530 Received: from [9.123.228.201] (adminib-st74ftv.cn.ibm.com [9.123.228.201]) by d28av01.in.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id u069vsvr007618; Wed, 6 Jan 2016 15:27:55 +0530 Subject: Re: [RFC PATCH v2 3/3] vfio-pci: Allow to mmap MSI-X table if EEH is supported To: Benjamin Herrenschmidt , Alex Williamson , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-doc@vger.kernel.org References: <1451551844-11732-1-git-send-email-xyjxie@linux.vnet.ibm.com> <1451551844-11732-4-git-send-email-xyjxie@linux.vnet.ibm.com> <1451941655.6585.8.camel@redhat.com> <1451943775.12575.6.camel@kernel.crashing.org> From: Yongji Xie Message-ID: <568CE52F.8030407@linux.vnet.ibm.com> Date: Wed, 6 Jan 2016 17:58:07 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:38.0) Gecko/20100101 Thunderbird/38.5.0 MIME-Version: 1.0 In-Reply-To: <1451943775.12575.6.camel@kernel.crashing.org> X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 16010609-4790-0000-0000-00000C892215 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: nikunj@linux.vnet.ibm.com, zhong@linux.vnet.ibm.com, corbet@lwn.net, aik@ozlabs.ru, warrier@linux.vnet.ibm.com, paulus@samba.org, bhelgaas@google.com Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" On 2016/1/5 5:42, Benjamin Herrenschmidt wrote: > On Mon, 2016-01-04 at 14:07 -0700, Alex Williamson wrote: >> On Thu, 2015-12-31 at 16:50 +0800, Yongji Xie wrote: >>> Current vfio-pci implementation disallows to mmap MSI-X >>> table in case that user get to touch this directly. >>> >>> However, EEH mechanism can ensure that a given pci device >>> can only shoot the MSIs assigned for its PE. So we think >>> it's safe to expose the MSI-X table to userspace because >>> the exposed MSI-X table can't be used to do harm to other >>> memory space. >>> >>> And with MSI-X table mmapped, some performance issues which >>> are caused when PCI adapters have critical registers in the >>> same page as the MSI-X table also can be resolved. >>> >>> So this patch adds a Kconfig option, VFIO_PCI_MMAP_MSIX, >>> to support for mmapping MSI-X table. >>> >>> Signed-off-by: Yongji Xie >>> --- >>> drivers/vfio/pci/Kconfig | 4 ++++ >>> drivers/vfio/pci/vfio_pci.c | 6 ++++-- >>> 2 files changed, 8 insertions(+), 2 deletions(-) >>> >>> diff --git a/drivers/vfio/pci/Kconfig b/drivers/vfio/pci/Kconfig >>> index 02912f1..67b0a2c 100644 >>> --- a/drivers/vfio/pci/Kconfig >>> +++ b/drivers/vfio/pci/Kconfig >>> @@ -23,6 +23,10 @@ config VFIO_PCI_MMAP >>> depends on VFIO_PCI >>> def_bool y if !S390 >>> >>> +config VFIO_PCI_MMAP_MSIX >>> + depends on VFIO_PCI_MMAP >>> + def_bool y if EEH >> Does CONFIG_EEH necessarily mean the EEH is enabled? Could the >> system >> not support EEH or could EEH be disabled via kernel commandline >> options? > EEH is definitely the wrong thing to test here anyway. What needs to be > tested is that the PCI Host bridge supports filtering of MSIs, so > ideally this should be some kind of host bridge attribute set by the > architecture backend. So do you mean this attribute can be added in pci_host_bridge like this: I can surely do it if there is no objection from PCI folks. Thanks. Regards, Yongji Xie > This can happen with or without CONFIG_EEH and you are right, > CONFIG_EEH can be enabled and the machine not support it. > > Any IODA bridge will support this. > > Cheers, > Ben. > --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -412,6 +412,7 @@ struct pci_host_bridge { void (*release_fn)(struct pci_host_bridge *); void *release_data; unsigned int ignore_reset_delay:1; /* for entire hierarchy */ + unsigned int msix_filtered:1; /* support filtering of MSIs */ /* Resource alignment requirements */ resource_size_t (*align_resource)(struct pci_dev *dev, const struct resource *res,