From patchwork Wed Sep 2 15:23:08 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pranith Kumar X-Patchwork-Id: 513542 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 9333214027F for ; Thu, 3 Sep 2015 01:24:13 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=Lh9TA3nj; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 6F8331A1F3C for ; Thu, 3 Sep 2015 01:24:13 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=Lh9TA3nj; dkim-atps=neutral X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Received: from mail-yk0-x231.google.com (mail-yk0-x231.google.com [IPv6:2607:f8b0:4002:c07::231]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 5E71D1A1E34 for ; Thu, 3 Sep 2015 01:22:52 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=Lh9TA3nj; dkim-atps=neutral Received: by ykcf206 with SMTP id f206so13162454ykc.3 for ; Wed, 02 Sep 2015 08:22:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=subject:to:references:cc:from:message-id:date:user-agent :mime-version:in-reply-to:content-type:content-transfer-encoding; bh=g52DIfMF0nTBkSOl2dvgF8sYS8zH4sn4u4aypP2YePA=; b=Lh9TA3njq6WuT5lw5nqY8O3eyujbYjXz0i3QAkVL9FYOyPwX7zAI7fjtehKd8svvnq vGpQAyaAWJGz/4PgOrQ1m9j6OIYPIT99WxQ98be2CSt+elbWlfcsGWS4NApCAGi1ynIW RFdiPVzVSak/LQJzVw/LuYJ1JlCqt+G4yEGUAlo0MyntgMoamTgPw7O4iXEVNs11kisk whTHpk6XrCcGMLw2FUoww0i7myCq2WTg1ILomJYSGGSMjYZXGwYeoymJK0DjwBkmHDpM Pfgi5M4rejGySrGGBGzCCMJxcd3t7UEeIy2dwO42JfCoRAWcjCOwz5OcOLzJY2JOT2sd LkUw== X-Received: by 10.13.196.129 with SMTP id g123mr34232870ywd.157.1441207370146; Wed, 02 Sep 2015 08:22:50 -0700 (PDT) Received: from evgadesktop.attlocal.net (108-232-152-155.lightspeed.tukrga.sbcglobal.net. [108.232.152.155]) by smtp.googlemail.com with ESMTPSA id l6sm21053166ywe.33.2015.09.02.08.22.48 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 02 Sep 2015 08:22:49 -0700 (PDT) Subject: Re: [RFC 3/5] powerpc: atomic: implement atomic{,64}_{add,sub}_return_* variants To: Will Deacon , "Paul E. McKenney" References: <1440730099-29133-1-git-send-email-boqun.feng@gmail.com> <1440730099-29133-4-git-send-email-boqun.feng@gmail.com> <20150828104854.GB16853@twins.programming.kicks-ass.net> <20150828120614.GC29325@fixme-laptop.cn.ibm.com> <20150828141602.GA924@fixme-laptop.cn.ibm.com> <20150828153921.GF19282@twins.programming.kicks-ass.net> <20150901190027.GP1612@arm.com> <20150901214540.GI4029@linux.vnet.ibm.com> <20150902095906.GC25720@arm.com> From: Pranith Kumar Message-ID: <55E7145C.7050505@gmail.com> Date: Wed, 2 Sep 2015 11:23:08 -0400 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.2.0 MIME-Version: 1.0 In-Reply-To: <20150902095906.GC25720@arm.com> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Waiman Long , Peter Zijlstra , Boqun Feng , "linux-kernel@vger.kernel.org" , Paul Mackerras , Thomas Gleixner , "linuxppc-dev@lists.ozlabs.org" , Ingo Molnar Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" Hi Will, On 09/02/2015 05:59 AM, Will Deacon wrote: > I just thought it was worth making this point, because it is prohibited > in SC and I don't want people to think that our RELEASE/ACQUIRE operations > are SC (even though they happen to be on arm64). This is interesting information. Does that mean that the following patch should work? (I am not proposing to use it, just trying to understand if REL+ACQ will act as a full barrier on ARM64, which you say it does). Thanks, Pranith. diff --git a/arch/arm64/include/asm/cmpxchg.h b/arch/arm64/include/asm/cmpxchg.h index d8c25b7..14a1b35 100644 --- a/arch/arm64/include/asm/cmpxchg.h +++ b/arch/arm64/include/asm/cmpxchg.h @@ -68,8 +68,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size BUILD_BUG(); } - smp_mb(); - return ret; + return smp_load_acquire(ret); } #define xchg(ptr,x) \