From patchwork Tue Aug 18 15:08:24 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Barkowski X-Patchwork-Id: 31563 Return-Path: X-Original-To: patchwork-incoming@bilbo.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from ozlabs.org (ozlabs.org [203.10.76.45]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "mx.ozlabs.org", Issuer "CA Cert Signing Authority" (verified OK)) by bilbo.ozlabs.org (Postfix) with ESMTPS id DA55BB7B86 for ; Wed, 19 Aug 2009 01:09:38 +1000 (EST) Received: by ozlabs.org (Postfix) id CCF8ADDD1B; Wed, 19 Aug 2009 01:09:38 +1000 (EST) Delivered-To: patchwork-incoming@ozlabs.org Received: from bilbo.ozlabs.org (bilbo.ozlabs.org [203.10.76.25]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "bilbo.ozlabs.org", Issuer "CAcert Class 3 Root" (verified OK)) by ozlabs.org (Postfix) with ESMTPS id CAACCDDD0B for ; Wed, 19 Aug 2009 01:09:38 +1000 (EST) Received: from bilbo.ozlabs.org (localhost [127.0.0.1]) by bilbo.ozlabs.org (Postfix) with ESMTP id BF40EB7D60 for ; Wed, 19 Aug 2009 01:09:25 +1000 (EST) Received: from ozlabs.org (ozlabs.org [203.10.76.45]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "mx.ozlabs.org", Issuer "CA Cert Signing Authority" (verified OK)) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4556AB708C for ; Wed, 19 Aug 2009 01:09:03 +1000 (EST) Received: by ozlabs.org (Postfix) id 3A6D5DDD1B; Wed, 19 Aug 2009 01:09:03 +1000 (EST) Delivered-To: linuxppc-dev@ozlabs.org Received: from lo.gmane.org (lo.gmane.org [80.91.229.12]) by ozlabs.org (Postfix) with ESMTP id C2922DDD0B for ; Wed, 19 Aug 2009 01:09:01 +1000 (EST) Received: from list by lo.gmane.org with local (Exim 4.50) id 1MdQIr-00082l-J6 for linuxppc-dev@ozlabs.org; Tue, 18 Aug 2009 17:08:49 +0200 Received: from 24.114.226.27 ([24.114.226.27]) by main.gmane.org with esmtp (Gmexim 0.1 (Debian)) id 1AlnuQ-0007hv-00 for ; Tue, 18 Aug 2009 17:08:49 +0200 Received: from michaelbarkowski by 24.114.226.27 with local (Gmexim 0.1 (Debian)) id 1AlnuQ-0007hv-00 for ; Tue, 18 Aug 2009 17:08:49 +0200 X-Injected-Via-Gmane: http://gmane.org/ To: linuxppc-dev@ozlabs.org From: Michael Barkowski Subject: [PATCH] mpc8xxx_spi: Fix polarity inversion in chipselect Date: Tue, 18 Aug 2009 11:08:24 -0400 Lines: 51 Message-ID: <4A8AC3E8.5070301@ruggedcom.com> Mime-Version: 1.0 X-Complaints-To: usenet@ger.gmane.org X-Gmane-NNTP-Posting-Host: 24.114.226.27 User-Agent: Mozilla-Thunderbird 2.0.0.19 (X11/20090103) X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org If we use open firmware, then alow_flags handles active-low chipselects, which is the same as SPI_CS_HIGH. This patch fixes the double negative. Signed-off-by: Michael Barkowski --- Anton, thanks to your device table matching support patch I can use open firmware to configure two spi devices on 8360E. I use the gpios node, with flags set to 1, matching OF_GPIO_ACTIVE_LOW. When I do this I notice that the polarity was already handled in a different way. Did some searching and didn't find it had been discussed. Here's what I am doing now - feel free to use it or abuse it :) (based in galak-powerpc/next plus your patches 1 and 2) drivers/spi/spi_mpc8xxx.c | 10 ++-------- 1 files changed, 2 insertions(+), 8 deletions(-) diff --git a/drivers/spi/spi_mpc8xxx.c b/drivers/spi/spi_mpc8xxx.c index 0fd0ec4..36bda94 100644 --- a/drivers/spi/spi_mpc8xxx.c +++ b/drivers/spi/spi_mpc8xxx.c @@ -159,14 +159,8 @@ static void mpc8xxx_spi_chipselect(struct spi_device *spi, int value) { struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master); struct fsl_spi_platform_data *pdata = spi->dev.parent->platform_data; - bool pol = spi->mode & SPI_CS_HIGH; struct spi_mpc8xxx_cs *cs = spi->controller_state; - if (value == BITBANG_CS_INACTIVE) { - if (pdata->cs_control) - pdata->cs_control(spi, !pol); - } - if (value == BITBANG_CS_ACTIVE) { u32 regval = mpc8xxx_spi_read_reg(&mpc8xxx_spi->base->mode); @@ -189,9 +183,9 @@ static void mpc8xxx_spi_chipselect(struct spi_device *spi, int value) mpc8xxx_spi_write_reg(mode, regval); local_irq_restore(flags); } - if (pdata->cs_control) - pdata->cs_control(spi, pol); } + if (pdata->cs_control) + pdata->cs_control(spi, value); } static