| Message ID | 20231124100241.660374-1-dario.binacchi@amarulasolutions.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | a9e1e4d6e8c77c732e8084b03bae0c78cafdceb0 |
| Headers | show |
| Series | powerpc/85xx: Fix typo in code comment | expand |
| Context | Check | Description |
|---|---|---|
| snowpatch_ozlabs/github-powerpc_ppctests | success | Successfully ran 8 jobs. |
| snowpatch_ozlabs/github-powerpc_selftests | success | Successfully ran 8 jobs. |
| snowpatch_ozlabs/github-powerpc_sparse | success | Successfully ran 4 jobs. |
| snowpatch_ozlabs/github-powerpc_clang | success | Successfully ran 6 jobs. |
| snowpatch_ozlabs/github-powerpc_kernel_qemu | success | Successfully ran 23 jobs. |
On Fri, Nov 24, 2023 at 2:08 PM Christophe Leroy <christophe.leroy@csgroup.eu> wrote: > > > > Le 24/11/2023 à 11:02, Dario Binacchi a écrit : > > s/singals/signals/ > > Is that really worth it to spend time on such a change ? > > By sending such a patch, you require people to spend time reviewing your > patch, then maintainer has to spend time handling your patch. > Furthermore, as you added a Fixes: tag, LTS maintainers will have to > spend time handling that too. > > Do you really think that this typo is worth a patch ? > > This kind of tiny error should be fixed through a more significant patch > adressing this file. But it is not worth a patch on its own. It's not the first time I've submitted patches of this kind, and no one has ever complained before. However, if it has become an issue, I won't do it anymore. Thanks and regards, Dario > > Christophe > > > > > > Fixes: 04e358d896a7 ("powerpc/85xx: Add Quicc Engine support for p1025rdb") > > Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> > > --- > > > > arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c > > index ec9f60fbebc7..e0cec670d8db 100644 > > --- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c > > +++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c > > @@ -76,7 +76,7 @@ static void __init mpc85xx_rdb_setup_arch(void) > > /* P1025 has pins muxed for QE and other functions. To > > * enable QE UEC mode, we need to set bit QE0 for UCC1 > > * in Eth mode, QE0 and QE3 for UCC5 in Eth mode, QE9 > > - * and QE12 for QE MII management singals in PMUXCR > > + * and QE12 for QE MII management signals in PMUXCR > > * register. > > */ > > setbits32(&guts->pmuxcr, MPC85xx_PMUXCR_QE(0) |
On Fri, 24 Nov 2023 11:02:37 +0100, Dario Binacchi wrote: > s/singals/signals/ > > Applied to powerpc/next. [1/1] powerpc/85xx: Fix typo in code comment https://git.kernel.org/powerpc/c/a9e1e4d6e8c77c732e8084b03bae0c78cafdceb0 cheers
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c index ec9f60fbebc7..e0cec670d8db 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c @@ -76,7 +76,7 @@ static void __init mpc85xx_rdb_setup_arch(void) /* P1025 has pins muxed for QE and other functions. To * enable QE UEC mode, we need to set bit QE0 for UCC1 * in Eth mode, QE0 and QE3 for UCC5 in Eth mode, QE9 - * and QE12 for QE MII management singals in PMUXCR + * and QE12 for QE MII management signals in PMUXCR * register. */ setbits32(&guts->pmuxcr, MPC85xx_PMUXCR_QE(0) |
s/singals/signals/ Fixes: 04e358d896a7 ("powerpc/85xx: Add Quicc Engine support for p1025rdb") Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> --- arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)