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(unknown [9.192.255.94]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 1 Jun 2022 05:48:55 +0000 (GMT) From: Rohan McLure To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH 1/6] powerpc: Add ZERO_GPRS macros for register clears Date: Wed, 1 Jun 2022 15:48:45 +1000 Message-Id: <20220601054850.250287-1-rmclure@linux.ibm.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: BSDus3J-Mc-PEwPf6ZrjLZfYXEjFwSbU X-Proofpoint-ORIG-GUID: Cd-6ph6RXK90F37hCMEGHRKVNTpX_CVQ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.874,Hydra:6.0.517,FMLib:17.11.64.514 definitions=2022-06-01_01,2022-05-30_03,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 phishscore=0 adultscore=0 bulkscore=0 mlxscore=0 clxscore=1011 malwarescore=0 suspectscore=0 spamscore=0 mlxlogscore=548 priorityscore=1501 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2204290000 definitions=main-2206010025 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rohan McLure , npiggin@gmail.com Errors-To: linuxppc-dev-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" Macros for restoring saving registers to and from the stack exist. Provide a macro for simply zeroing a range of gprs, or an individual gpr. Signed-off-by: Rohan McLure --- arch/powerpc/include/asm/ppc_asm.h | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h index 4dea2d963738..3fb37a9767f7 100644 --- a/arch/powerpc/include/asm/ppc_asm.h +++ b/arch/powerpc/include/asm/ppc_asm.h @@ -33,6 +33,19 @@ .endr .endm +/* + * Simplification of OP_REGS, for an arbitrary right hand operand. + * + * op reg, rhs + */ +.macro BINOP_REGS op, rhs, start, end + .Lreg=\start + .rept (\end - \start + 1) + \op .Lreg, \rhs + .Lreg=.Lreg+1 + .endr +.endm + /* * Macros for storing registers into and loading registers from * exception frames. @@ -49,6 +62,10 @@ #define REST_NVGPRS(base) REST_GPRS(13, 31, base) #endif +#define ZERO_GPRS(start, end) BINOP_REGS li, 0, start, end +#define ZERO_NVGPRS() ZERO_GPRS(14, 31) +#define ZERO_GPR(n) ZERO_GPRS(n, n) + #define SAVE_GPR(n, base) SAVE_GPRS(n, n, base) #define REST_GPR(n, base) REST_GPRS(n, n, base)