| Message ID | 20200916081831.24747-1-ran.wang_1@nxp.com (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | [1/5] Documentation: dt: binding: fsl: Add 'fsl, ippdexpcr1-alt-addr' property | expand |
| Context | Check | Description |
|---|---|---|
| snowpatch_ozlabs/apply_patch | success | Successfully applied on branch powerpc/merge (27e2fbcd815a088d7d83c7158f76b6e95ab07c50) |
| snowpatch_ozlabs/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 31 lines checked |
| snowpatch_ozlabs/needsstable | success | Patch has no Fixes tags |
> -----Original Message----- > From: Ran Wang <ran.wang_1@nxp.com> > Sent: Wednesday, September 16, 2020 3:18 AM > To: Leo Li <leoyang.li@nxp.com>; Rob Herring <robh+dt@kernel.org>; > Shawn Guo <shawnguo@kernel.org> > Cc: linuxppc-dev@lists.ozlabs.org; linux-arm-kernel@lists.infradead.org; > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; Biwen Li > <biwen.li@nxp.com>; Ran Wang <ran.wang_1@nxp.com> > Subject: [PATCH 1/5] Documentation: dt: binding: fsl: Add 'fsl,ippdexpcr1-alt- > addr' property > > From: Biwen Li <biwen.li@nxp.com> > > The 'fsl,ippdexpcr1-alt-addr' property is used to handle an errata A-008646 on > LS1021A It looks like the previous version of this patch has gotten the reviewed-by from Rob. It would be good to be added to the patch for new submission. > > Signed-off-by: Biwen Li <biwen.li@nxp.com> > Signed-off-by: Ran Wang <ran.wang_1@nxp.com> > --- > Documentation/devicetree/bindings/soc/fsl/rcpm.txt | 19 > +++++++++++++++++++ > 1 file changed, 19 insertions(+) > > diff --git a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > index 5a33619..1be58a3 100644 > --- a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > +++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > @@ -34,6 +34,11 @@ Chassis Version Example Chips > Optional properties: > - little-endian : RCPM register block is Little Endian. Without it RCPM > will be Big Endian (default case). > + - fsl,ippdexpcr1-alt-addr : The property is related to a hardware issue > + on SoC LS1021A and only needed on SoC LS1021A. > + Must include 2 entries: > + The first entry must be a link to the SCFG device node. > + The 2nd entry must be offset of register IPPDEXPCR1 in SCFG. > > Example: > The RCPM node for T4240: > @@ -43,6 +48,20 @@ The RCPM node for T4240: > #fsl,rcpm-wakeup-cells = <2>; > }; > > +The RCPM node for LS1021A: > + rcpm: rcpm@1ee2140 { > + compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+"; > + reg = <0x0 0x1ee2140 0x0 0x8>; > + #fsl,rcpm-wakeup-cells = <2>; > + > + /* > + * The second and third entry compose an alt offset > + * address for IPPDEXPCR1(SCFG_SPARECR8) > + */ > + fsl,ippdexpcr1-alt-addr = <&scfg 0x51c>; > + }; > + > + > * Freescale RCPM Wakeup Source Device Tree Bindings > ------------------------------------------- > Required fsl,rcpm-wakeup property should be added to a device node if the > device > -- > 2.7.4
Hi Leo, Rob, On Tuesday, September 22, 2020 6:20 AM, Leo Li wrote: > > > -----Original Message----- > > From: Ran Wang <ran.wang_1@nxp.com> > > Sent: Wednesday, September 16, 2020 3:18 AM > > To: Leo Li <leoyang.li@nxp.com>; Rob Herring <robh+dt@kernel.org>; > > Shawn Guo <shawnguo@kernel.org> > > Cc: linuxppc-dev@lists.ozlabs.org; > > linux-arm-kernel@lists.infradead.org; > > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; Biwen Li > > <biwen.li@nxp.com>; Ran Wang <ran.wang_1@nxp.com> > > Subject: [PATCH 1/5] Documentation: dt: binding: fsl: Add > > 'fsl,ippdexpcr1-alt- addr' property > > > > From: Biwen Li <biwen.li@nxp.com> > > > > The 'fsl,ippdexpcr1-alt-addr' property is used to handle an errata > > A-008646 on LS1021A > > It looks like the previous version of this patch has gotten the reviewed-by from > Rob. It would be good to be added to the patch for new submission. Actually this patch has one update from previous version (https://lore.kernel.org/patchwork/patch/1161631/): Reduce entry number from 3 to 2. So I'd like to have a review for this one, sorry for not highlight this in advance. Regards, Ran > > > > Signed-off-by: Biwen Li <biwen.li@nxp.com> > > Signed-off-by: Ran Wang <ran.wang_1@nxp.com> > > --- > > Documentation/devicetree/bindings/soc/fsl/rcpm.txt | 19 > > +++++++++++++++++++ > > 1 file changed, 19 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > index 5a33619..1be58a3 100644 > > --- a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > +++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > @@ -34,6 +34,11 @@ Chassis Version Example Chips > > Optional properties: > > - little-endian : RCPM register block is Little Endian. Without it RCPM > > will be Big Endian (default case). > > + - fsl,ippdexpcr1-alt-addr : The property is related to a hardware issue > > + on SoC LS1021A and only needed on SoC LS1021A. > > + Must include 2 entries: > > + The first entry must be a link to the SCFG device node. > > + The 2nd entry must be offset of register IPPDEXPCR1 in SCFG. > > > > Example: > > The RCPM node for T4240: > > @@ -43,6 +48,20 @@ The RCPM node for T4240: > > #fsl,rcpm-wakeup-cells = <2>; > > }; > > > > +The RCPM node for LS1021A: > > + rcpm: rcpm@1ee2140 { > > + compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+"; > > + reg = <0x0 0x1ee2140 0x0 0x8>; > > + #fsl,rcpm-wakeup-cells = <2>; > > + > > + /* > > + * The second and third entry compose an alt offset > > + * address for IPPDEXPCR1(SCFG_SPARECR8) > > + */ > > + fsl,ippdexpcr1-alt-addr = <&scfg 0x51c>; > > + }; > > + > > + > > * Freescale RCPM Wakeup Source Device Tree Bindings > > ------------------------------------------- > > Required fsl,rcpm-wakeup property should be added to a device node if > > the device > > -- > > 2.7.4
On Wed, Sep 16, 2020 at 04:18:27PM +0800, Ran Wang wrote: > From: Biwen Li <biwen.li@nxp.com> > > The 'fsl,ippdexpcr1-alt-addr' property is used to handle an errata A-008646 > on LS1021A > > Signed-off-by: Biwen Li <biwen.li@nxp.com> > Signed-off-by: Ran Wang <ran.wang_1@nxp.com> > --- > Documentation/devicetree/bindings/soc/fsl/rcpm.txt | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > > diff --git a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > index 5a33619..1be58a3 100644 > --- a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > +++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > @@ -34,6 +34,11 @@ Chassis Version Example Chips > Optional properties: > - little-endian : RCPM register block is Little Endian. Without it RCPM > will be Big Endian (default case). > + - fsl,ippdexpcr1-alt-addr : The property is related to a hardware issue > + on SoC LS1021A and only needed on SoC LS1021A. > + Must include 2 entries: > + The first entry must be a link to the SCFG device node. > + The 2nd entry must be offset of register IPPDEXPCR1 in SCFG. You don't need a DT change for this. You can find SCFG node by its compatible string and then the offset should be known given this issue is only on 1 SoC. Rob
Hi Rob, On Wednesday, September 23, 2020 10:33 AM, Rob Herring wrote: > > On Wed, Sep 16, 2020 at 04:18:27PM +0800, Ran Wang wrote: > > From: Biwen Li <biwen.li@nxp.com> > > > > The 'fsl,ippdexpcr1-alt-addr' property is used to handle an errata > > A-008646 on LS1021A > > > > Signed-off-by: Biwen Li <biwen.li@nxp.com> > > Signed-off-by: Ran Wang <ran.wang_1@nxp.com> > > --- > > Documentation/devicetree/bindings/soc/fsl/rcpm.txt | 19 > > +++++++++++++++++++ > > 1 file changed, 19 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > index 5a33619..1be58a3 100644 > > --- a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > +++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > @@ -34,6 +34,11 @@ Chassis Version Example Chips > > Optional properties: > > - little-endian : RCPM register block is Little Endian. Without it RCPM > > will be Big Endian (default case). > > + - fsl,ippdexpcr1-alt-addr : The property is related to a hardware issue > > + on SoC LS1021A and only needed on SoC LS1021A. > > + Must include 2 entries: > > + The first entry must be a link to the SCFG device node. > > + The 2nd entry must be offset of register IPPDEXPCR1 in SCFG. > > You don't need a DT change for this. You can find SCFG node by its compatible > string and then the offset should be known given this issue is only on 1 SoC. Did you mean that RCPM driver just to access IPPDEXPCR1 shadowed register in SCFG directly without fetching it's offset info. from DT? Regards, Ran
Hi Rob Not sure whether you have missed this mail with my query. Regards, Ran On Wednesday, September 23, 2020 2:44 PM Ran Wang wrote: > > Hi Rob, > > On Wednesday, September 23, 2020 10:33 AM, Rob Herring wrote: > > > > On Wed, Sep 16, 2020 at 04:18:27PM +0800, Ran Wang wrote: > > > From: Biwen Li <biwen.li@nxp.com> > > > > > > The 'fsl,ippdexpcr1-alt-addr' property is used to handle an errata > > > A-008646 on LS1021A > > > > > > Signed-off-by: Biwen Li <biwen.li@nxp.com> > > > Signed-off-by: Ran Wang <ran.wang_1@nxp.com> > > > --- > > > Documentation/devicetree/bindings/soc/fsl/rcpm.txt | 19 > > > +++++++++++++++++++ > > > 1 file changed, 19 insertions(+) > > > > > > diff --git a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > > b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > > index 5a33619..1be58a3 100644 > > > --- a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > > +++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > > @@ -34,6 +34,11 @@ Chassis Version Example Chips > > > Optional properties: > > > - little-endian : RCPM register block is Little Endian. Without it RCPM > > > will be Big Endian (default case). > > > + - fsl,ippdexpcr1-alt-addr : The property is related to a hardware issue > > > + on SoC LS1021A and only needed on SoC LS1021A. > > > + Must include 2 entries: > > > + The first entry must be a link to the SCFG device node. > > > + The 2nd entry must be offset of register IPPDEXPCR1 in SCFG. > > > > You don't need a DT change for this. You can find SCFG node by its > > compatible string and then the offset should be known given this issue is > only on 1 SoC. > > Did you mean that RCPM driver just to access IPPDEXPCR1 shadowed register > in SCFG directly without fetching it's offset info. from DT? > > Regards, > Ran
On Wed, Sep 23, 2020 at 1:44 AM Ran Wang <ran.wang_1@nxp.com> wrote: > > Hi Rob, > > On Wednesday, September 23, 2020 10:33 AM, Rob Herring wrote: > > > > On Wed, Sep 16, 2020 at 04:18:27PM +0800, Ran Wang wrote: > > > From: Biwen Li <biwen.li@nxp.com> > > > > > > The 'fsl,ippdexpcr1-alt-addr' property is used to handle an errata > > > A-008646 on LS1021A > > > > > > Signed-off-by: Biwen Li <biwen.li@nxp.com> > > > Signed-off-by: Ran Wang <ran.wang_1@nxp.com> > > > --- > > > Documentation/devicetree/bindings/soc/fsl/rcpm.txt | 19 > > > +++++++++++++++++++ > > > 1 file changed, 19 insertions(+) > > > > > > diff --git a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > > b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > > index 5a33619..1be58a3 100644 > > > --- a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > > +++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > > @@ -34,6 +34,11 @@ Chassis Version Example Chips > > > Optional properties: > > > - little-endian : RCPM register block is Little Endian. Without it RCPM > > > will be Big Endian (default case). > > > + - fsl,ippdexpcr1-alt-addr : The property is related to a hardware issue > > > + on SoC LS1021A and only needed on SoC LS1021A. > > > + Must include 2 entries: > > > + The first entry must be a link to the SCFG device node. > > > + The 2nd entry must be offset of register IPPDEXPCR1 in SCFG. > > > > You don't need a DT change for this. You can find SCFG node by its compatible > > string and then the offset should be known given this issue is only on 1 SoC. > > Did you mean that RCPM driver just to access IPPDEXPCR1 shadowed register in SCFG > directly without fetching it's offset info. from DT? Yes. There's only 1 possible value of the offset because there's only one SoC, so the driver can hardcode the offset. And I assume there's only one SCFG node, so you can find it by its compatible string (of_find_compatible_node). Rob
Hi Rob, On Monday, September 28, 2020 9:57 PM, Rob Herring wrote: > > On Wed, Sep 23, 2020 at 1:44 AM Ran Wang <ran.wang_1@nxp.com> wrote: > > > > Hi Rob, > > > > On Wednesday, September 23, 2020 10:33 AM, Rob Herring wrote: > > > > > > On Wed, Sep 16, 2020 at 04:18:27PM +0800, Ran Wang wrote: > > > > From: Biwen Li <biwen.li@nxp.com> > > > > > > > > The 'fsl,ippdexpcr1-alt-addr' property is used to handle an errata > > > > A-008646 on LS1021A > > > > > > > > Signed-off-by: Biwen Li <biwen.li@nxp.com> > > > > Signed-off-by: Ran Wang <ran.wang_1@nxp.com> > > > > --- > > > > Documentation/devicetree/bindings/soc/fsl/rcpm.txt | 19 > > > > +++++++++++++++++++ > > > > 1 file changed, 19 insertions(+) > > > > > > > > diff --git a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > > > b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > > > index 5a33619..1be58a3 100644 > > > > --- a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > > > +++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > > > @@ -34,6 +34,11 @@ Chassis Version Example Chips > > > > Optional properties: > > > > - little-endian : RCPM register block is Little Endian. Without it RCPM > > > > will be Big Endian (default case). > > > > + - fsl,ippdexpcr1-alt-addr : The property is related to a hardware issue > > > > + on SoC LS1021A and only needed on SoC LS1021A. > > > > + Must include 2 entries: > > > > + The first entry must be a link to the SCFG device node. > > > > + The 2nd entry must be offset of register IPPDEXPCR1 in SCFG. > > > > > > You don't need a DT change for this. You can find SCFG node by its > > > compatible string and then the offset should be known given this issue is > only on 1 SoC. > > > > Did you mean that RCPM driver just to access IPPDEXPCR1 shadowed > > register in SCFG directly without fetching it's offset info. from DT? > > Yes. There's only 1 possible value of the offset because there's only one SoC, so > the driver can hardcode the offset. And I assume there's only one SCFG node, > so you can find it by its compatible string (of_find_compatible_node). Got it, let me update this in next version, thank you. Regards, Ran > Rob
diff --git a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt index 5a33619..1be58a3 100644 --- a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt +++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt @@ -34,6 +34,11 @@ Chassis Version Example Chips Optional properties: - little-endian : RCPM register block is Little Endian. Without it RCPM will be Big Endian (default case). + - fsl,ippdexpcr1-alt-addr : The property is related to a hardware issue + on SoC LS1021A and only needed on SoC LS1021A. + Must include 2 entries: + The first entry must be a link to the SCFG device node. + The 2nd entry must be offset of register IPPDEXPCR1 in SCFG. Example: The RCPM node for T4240: @@ -43,6 +48,20 @@ The RCPM node for T4240: #fsl,rcpm-wakeup-cells = <2>; }; +The RCPM node for LS1021A: + rcpm: rcpm@1ee2140 { + compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+"; + reg = <0x0 0x1ee2140 0x0 0x8>; + #fsl,rcpm-wakeup-cells = <2>; + + /* + * The second and third entry compose an alt offset + * address for IPPDEXPCR1(SCFG_SPARECR8) + */ + fsl,ippdexpcr1-alt-addr = <&scfg 0x51c>; + }; + + * Freescale RCPM Wakeup Source Device Tree Bindings ------------------------------------------- Required fsl,rcpm-wakeup property should be added to a device node if the device