| Message ID | 20181023080456.2558-1-naveen.n.rao@linux.vnet.ibm.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | a95ecac5cb2fc8a8ee606991384d33ee121df00c |
| Headers | show |
| Series | selftests/powerpc: Relax L1d miss targets for rfi_flush test | expand |
| Context | Check | Description |
|---|---|---|
| snowpatch_ozlabs/apply_patch | success | next/apply_patch Successfully applied |
| snowpatch_ozlabs/checkpatch | success | Test checkpatch on branch next |
| snowpatch_ozlabs/build-ppc64le | success | Test build-ppc64le on branch next |
| snowpatch_ozlabs/build-ppc64be | success | Test build-ppc64be on branch next |
| snowpatch_ozlabs/build-ppc64e | success | Test build-ppc64e on branch next |
| snowpatch_ozlabs/build-ppc32 | success | Test build-ppc32 on branch next |
On Tue, 23 Oct 2018 at 18:35, Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> wrote: > > When running the rfi_flush test, if the system is loaded, we see two > issues: > 1. The L1d misses when rfi_flush is disabled increase significantly due > to other workloads interfering with the cache. > 2. The L1d misses when rfi_flush is enabled sometimes goes slightly > below the expected number of misses. > > To address these, let's relax the expected number of L1d misses: > 1. When rfi_flush is disabled, we allow upto half the expected number of > the misses for when rfi_flush is enabled. > 2. When rfi_flush is enabled, we allow ~1% lower number of cache misses. > > Reported-by: Joel Stanley <joel@jms.id.au> > Signed-off-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> Thanks, this now passes 10/10 runs on my Romulus machine. A log is attached below. Tested-by: Joel Stanley <joel@jms.id.au> Cheers, Joel --- for i in `seq 1 10`; do sudo ./rfi_flush; done test: rfi_flush_test tags: git_version:next-20181018-67-g61f7abf00719 PASS (L1D misses with rfi_flush=0: 5013939 < 95000000) [10/10 pass] PASS (L1D misses with rfi_flush=1: 195054696 > 190000000) [10/10 pass] success: rfi_flush_test test: rfi_flush_test tags: git_version:next-20181018-67-g61f7abf00719 PASS (L1D misses with rfi_flush=0: 11015957 < 95000000) [10/10 pass] PASS (L1D misses with rfi_flush=1: 195053292 > 190000000) [10/10 pass] success: rfi_flush_test test: rfi_flush_test tags: git_version:next-20181018-67-g61f7abf00719 PASS (L1D misses with rfi_flush=0: 8017248 < 95000000) [10/10 pass] PASS (L1D misses with rfi_flush=1: 195145579 > 190000000) [10/10 pass] success: rfi_flush_test test: rfi_flush_test tags: git_version:next-20181018-67-g61f7abf00719 PASS (L1D misses with rfi_flush=0: 11015308 < 95000000) [10/10 pass] PASS (L1D misses with rfi_flush=1: 195042376 > 190000000) [10/10 pass] success: rfi_flush_test test: rfi_flush_test tags: git_version:next-20181018-67-g61f7abf00719 PASS (L1D misses with rfi_flush=0: 1021356 < 95000000) [10/10 pass] PASS (L1D misses with rfi_flush=1: 195031624 > 190000000) [10/10 pass] success: rfi_flush_test test: rfi_flush_test tags: git_version:next-20181018-67-g61f7abf00719 PASS (L1D misses with rfi_flush=0: 6015342 < 95000000) [10/10 pass] PASS (L1D misses with rfi_flush=1: 195037322 > 190000000) [10/10 pass] success: rfi_flush_test test: rfi_flush_test tags: git_version:next-20181018-67-g61f7abf00719 PASS (L1D misses with rfi_flush=0: 16635 < 95000000) [10/10 pass] PASS (L1D misses with rfi_flush=1: 195032476 > 190000000) [10/10 pass] success: rfi_flush_test test: rfi_flush_test tags: git_version:next-20181018-67-g61f7abf00719 PASS (L1D misses with rfi_flush=0: 6013599 < 95000000) [10/10 pass] PASS (L1D misses with rfi_flush=1: 195060037 > 190000000) [10/10 pass] success: rfi_flush_test test: rfi_flush_test tags: git_version:next-20181018-67-g61f7abf00719 PASS (L1D misses with rfi_flush=0: 25236 < 95000000) [10/10 pass] PASS (L1D misses with rfi_flush=1: 195052859 > 190000000) [10/10 pass] success: rfi_flush_test test: rfi_flush_test tags: git_version:next-20181018-67-g61f7abf00719 PASS (L1D misses with rfi_flush=0: 18120 < 95000000) [10/10 pass] PASS (L1D misses with rfi_flush=1: 195014212 > 190000000) [10/10 pass] success: rfi_flush_test
On Tue, 2018-10-23 at 08:04:56 UTC, "Naveen N. Rao" wrote: > When running the rfi_flush test, if the system is loaded, we see two > issues: > 1. The L1d misses when rfi_flush is disabled increase significantly due > to other workloads interfering with the cache. > 2. The L1d misses when rfi_flush is enabled sometimes goes slightly > below the expected number of misses. > > To address these, let's relax the expected number of L1d misses: > 1. When rfi_flush is disabled, we allow upto half the expected number of > the misses for when rfi_flush is enabled. > 2. When rfi_flush is enabled, we allow ~1% lower number of cache misses. > > Reported-by: Joel Stanley <joel@jms.id.au> > Signed-off-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> > Tested-by: Joel Stanley <joel@jms.id.au> Applied to powerpc next, thanks. https://git.kernel.org/powerpc/c/a95ecac5cb2fc8a8ee606991384d33 cheers
diff --git a/tools/testing/selftests/powerpc/security/rfi_flush.c b/tools/testing/selftests/powerpc/security/rfi_flush.c index 564ed45bbf73..0a7d0afb26b8 100644 --- a/tools/testing/selftests/powerpc/security/rfi_flush.c +++ b/tools/testing/selftests/powerpc/security/rfi_flush.c @@ -49,6 +49,7 @@ int rfi_flush_test(void) struct perf_event_read v; __u64 l1d_misses_total = 0; unsigned long iterations = 100000, zero_size = 24 * 1024; + unsigned long l1d_misses_expected; int rfi_flush_org, rfi_flush; SKIP_IF(geteuid() != 0); @@ -71,6 +72,12 @@ int rfi_flush_test(void) iter = repetitions; + /* + * We expect to see l1d miss for each cacheline access when rfi_flush + * is set. Allow a small variation on this. + */ + l1d_misses_expected = iterations * (zero_size / CACHELINE_SIZE - 2); + again: FAIL_IF(perf_event_reset(fd)); @@ -78,10 +85,9 @@ int rfi_flush_test(void) FAIL_IF(read(fd, &v, sizeof(v)) != sizeof(v)); - /* Expect at least zero_size/CACHELINE_SIZE misses per iteration */ - if (v.l1d_misses >= (iterations * zero_size / CACHELINE_SIZE) && rfi_flush) + if (rfi_flush && v.l1d_misses >= l1d_misses_expected) passes++; - else if (v.l1d_misses < iterations && !rfi_flush) + else if (!rfi_flush && v.l1d_misses < (l1d_misses_expected / 2)) passes++; l1d_misses_total += v.l1d_misses; @@ -92,13 +98,15 @@ int rfi_flush_test(void) if (passes < repetitions) { printf("FAIL (L1D misses with rfi_flush=%d: %llu %c %lu) [%d/%d failures]\n", rfi_flush, l1d_misses_total, rfi_flush ? '<' : '>', - rfi_flush ? (repetitions * iterations * zero_size / CACHELINE_SIZE) : iterations, + rfi_flush ? repetitions * l1d_misses_expected : + repetitions * l1d_misses_expected / 2, repetitions - passes, repetitions); rc = 1; } else printf("PASS (L1D misses with rfi_flush=%d: %llu %c %lu) [%d/%d pass]\n", rfi_flush, l1d_misses_total, rfi_flush ? '>' : '<', - rfi_flush ? (repetitions * iterations * zero_size / CACHELINE_SIZE) : iterations, + rfi_flush ? repetitions * l1d_misses_expected : + repetitions * l1d_misses_expected / 2, passes, repetitions); if (rfi_flush == rfi_flush_org) {
When running the rfi_flush test, if the system is loaded, we see two issues: 1. The L1d misses when rfi_flush is disabled increase significantly due to other workloads interfering with the cache. 2. The L1d misses when rfi_flush is enabled sometimes goes slightly below the expected number of misses. To address these, let's relax the expected number of L1d misses: 1. When rfi_flush is disabled, we allow upto half the expected number of the misses for when rfi_flush is enabled. 2. When rfi_flush is enabled, we allow ~1% lower number of cache misses. Reported-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> --- .../selftests/powerpc/security/rfi_flush.c | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-)