From patchwork Tue Jun 15 06:06:12 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "K.Prasad" X-Patchwork-Id: 55612 X-Patchwork-Delegate: paulus@samba.org Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from bilbo.ozlabs.org (localhost [127.0.0.1]) by ozlabs.org (Postfix) with ESMTP id A0A1B101707 for ; Tue, 15 Jun 2010 16:06:27 +1000 (EST) Received: by ozlabs.org (Postfix) id AF0EC100811; Tue, 15 Jun 2010 16:06:18 +1000 (EST) Delivered-To: linuxppc-dev@ozlabs.org Received: from e28smtp04.in.ibm.com (e28smtp04.in.ibm.com [122.248.162.4]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "e28smtp04.in.ibm.com", Issuer "Equifax" (verified OK)) by ozlabs.org (Postfix) with ESMTPS id 563461007FE for ; Tue, 15 Jun 2010 16:06:18 +1000 (EST) Received: from d28relay05.in.ibm.com (d28relay05.in.ibm.com [9.184.220.62]) by e28smtp04.in.ibm.com (8.14.4/8.13.1) with ESMTP id o5F66EdP010230 for ; Tue, 15 Jun 2010 11:36:14 +0530 Received: from d28av02.in.ibm.com (d28av02.in.ibm.com [9.184.220.64]) by d28relay05.in.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id o5F66E3B3223672 for ; Tue, 15 Jun 2010 11:36:14 +0530 Received: from d28av02.in.ibm.com (loopback [127.0.0.1]) by d28av02.in.ibm.com (8.14.4/8.13.1/NCO v10.0 AVout) with ESMTP id o5F66DhR016445 for ; Tue, 15 Jun 2010 16:06:14 +1000 Received: from in.ibm.com ([9.124.35.44]) by d28av02.in.ibm.com (8.14.4/8.13.1/NCO v10.0 AVin) with ESMTP id o5F66CFg016434 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES128-SHA bits=128 verify=NO); Tue, 15 Jun 2010 16:06:13 +1000 Date: Tue, 15 Jun 2010 11:36:12 +0530 From: "K.Prasad" To: "linuxppc-dev@ozlabs.org" , Paul Mackerras Subject: [Patch 5/5] PPC64-HWBKPT: Discard extraneous interrupt due to accesses outside symbol length Message-ID: <20100615060612.GF4790@in.ibm.com> References: <20100615055010.108795721@linux.vnet.ibm.com> MIME-Version: 1.0 Content-Disposition: inline; filename=handle_extraneous_interrupt User-Agent: Mutt/1.5.20 (2009-12-10) Cc: Michael Neuling , Benjamin Herrenschmidt , shaggy@linux.vnet.ibm.com, Frederic Weisbecker , David Gibson , Alan Stern , "K.Prasad" , Roland McGrath X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Many a times, the requested breakpoint length can be less than the fixed breakpoint length i.e. 8 bytes supported by PowerPC BookIII S. This could lead to extraneous interrupts resulting in false breakpoint notifications. The patch below detects and discards such interrupts for non-ptrace requests (we don't want to change ptrace behaviour for fear of breaking compatability). [Suggestions from Paul Mackerras to add a new flag in 'struct arch_hw_breakpoint' to identify extraneous interrupts] Signed-off-by: K.Prasad --- arch/powerpc/include/asm/hw_breakpoint.h | 1 + arch/powerpc/kernel/hw_breakpoint.c | 23 +++++++++++++++++++++-- 2 files changed, 22 insertions(+), 2 deletions(-) Index: linux-2.6.ppc64_test/arch/powerpc/kernel/hw_breakpoint.c =================================================================== --- linux-2.6.ppc64_test.orig/arch/powerpc/kernel/hw_breakpoint.c +++ linux-2.6.ppc64_test/arch/powerpc/kernel/hw_breakpoint.c @@ -202,6 +202,7 @@ int __kprobes hw_breakpoint_handler(stru struct pt_regs *regs = args->regs; int stepped = 1; struct arch_hw_breakpoint *info; + unsigned long dar = regs->dar; /* Disable breakpoints during exception handling */ set_dabr(0); @@ -232,6 +233,22 @@ int __kprobes hw_breakpoint_handler(stru goto out; } + /* + * Verify if dar lies within the address range occupied by the symbol + * being watched to filter extraneous exceptions. + */ + if (!((bp->attr.bp_addr <= dar) && + (dar <= (bp->attr.bp_addr + bp->attr.bp_len)))) { + /* + * This exception is triggered not because of a memory access + * on the monitored variable but in the double-word address + * range in which it is contained. We will consume this + * exception, considering it as 'noise'. + */ + info->extraneous_interrupt = true; + } else + info->extraneous_interrupt = false; + /* Do not emulate user-space instructions, instead single-step them */ if (user_mode(regs)) { bp->ctx->task->thread.last_hit_ubp = bp; @@ -255,7 +272,8 @@ int __kprobes hw_breakpoint_handler(stru * As a policy, the callback is invoked in a 'trigger-after-execute' * fashion */ - perf_bp_event(bp, regs); + if (!info->extraneous_interrupt) + perf_bp_event(bp, regs); set_dabr(info->address | info->type | DABR_TRANSLATION); out: @@ -286,7 +304,8 @@ int __kprobes single_step_dabr_instructi * We shall invoke the user-defined callback function in the single * stepping handler to confirm to 'trigger-after-execute' semantics */ - perf_bp_event(bp, regs); + if (!bp_info->extraneous_interrupt) + perf_bp_event(bp, regs); /* * Do not disable MSR_SE if the process was already in Index: linux-2.6.ppc64_test/arch/powerpc/include/asm/hw_breakpoint.h =================================================================== --- linux-2.6.ppc64_test.orig/arch/powerpc/include/asm/hw_breakpoint.h +++ linux-2.6.ppc64_test/arch/powerpc/include/asm/hw_breakpoint.h @@ -27,6 +27,7 @@ #ifdef CONFIG_HAVE_HW_BREAKPOINT struct arch_hw_breakpoint { + bool extraneous_interrupt; u8 len; /* length of the target data symbol */ int type; unsigned long address;