From patchwork Mon May 25 01:14:23 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "K.Prasad" X-Patchwork-Id: 27586 X-Patchwork-Delegate: david@gibson.dropbear.id.au Return-Path: X-Original-To: patchwork-incoming@bilbo.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from ozlabs.org (ozlabs.org [203.10.76.45]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "mx.ozlabs.org", Issuer "CA Cert Signing Authority" (verified OK)) by bilbo.ozlabs.org (Postfix) with ESMTPS id 5E2DEB6F35 for ; Mon, 25 May 2009 11:16:19 +1000 (EST) Received: by ozlabs.org (Postfix) id 23AC7DE100; Mon, 25 May 2009 11:15:08 +1000 (EST) Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [127.0.0.1]) by ozlabs.org (Postfix) with ESMTP id 1C652DE443 for ; Mon, 25 May 2009 11:15:08 +1000 (EST) X-Original-To: linuxppc-dev@ozlabs.org Delivered-To: linuxppc-dev@ozlabs.org Received: from e23smtp03.au.ibm.com (e23smtp03.au.ibm.com [202.81.31.145]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "e23smtp03.au.ibm.com", Issuer "Equifax" (verified OK)) by ozlabs.org (Postfix) with ESMTPS id 5AE44DE214 for ; Mon, 25 May 2009 11:14:38 +1000 (EST) Received: from d23relay01.au.ibm.com (d23relay01.au.ibm.com [202.81.31.243]) by e23smtp03.au.ibm.com (8.13.1/8.13.1) with ESMTP id n4P1CbEs016508 for ; Mon, 25 May 2009 11:12:37 +1000 Received: from d23av04.au.ibm.com (d23av04.au.ibm.com [9.190.235.139]) by d23relay01.au.ibm.com (8.13.8/8.13.8/NCO v9.2) with ESMTP id n4P1EZYc557458 for ; Mon, 25 May 2009 11:14:35 +1000 Received: from d23av04.au.ibm.com (loopback [127.0.0.1]) by d23av04.au.ibm.com (8.12.11.20060308/8.13.3) with ESMTP id n4P1EY0G029090 for ; Mon, 25 May 2009 11:14:35 +1000 Received: from in.ibm.com ([9.78.194.63]) by d23av04.au.ibm.com (8.12.11.20060308/8.12.11) with ESMTP id n4P1EMWQ028166 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Mon, 25 May 2009 11:14:29 +1000 Date: Mon, 25 May 2009 06:44:23 +0530 From: "K.Prasad" To: linuxppc-dev@ozlabs.org Subject: [Patch 1/6] Prepare the PowerPC platform for HW Breakpoint infrastructure Message-ID: <20090525011423.GB11078@in.ibm.com> References: <20090525004730.944465878@prasadkr_t60p.in.ibm.com> MIME-Version: 1.0 Content-Disposition: inline; filename=ppc64_prepare_code_01 User-Agent: Mutt/1.5.18 (2008-05-17) Cc: Michael Neuling , Benjamin Herrenschmidt , Alan Stern , paulus@samba.org, "K.Prasad" , Roland McGrath X-BeenThere: linuxppc-dev@ozlabs.org X-Mailman-Version: 2.1.11 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@ozlabs.org Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@ozlabs.org Prepare the PowerPC code for HW Breakpoint infrastructure patches by including relevant constant definitions and function declarations. Signed-off-by: K.Prasad --- arch/powerpc/include/asm/hw_breakpoint.h | 57 +++++++++++++++++++++++++++++++ arch/powerpc/include/asm/processor.h | 1 arch/powerpc/include/asm/reg.h | 3 + 3 files changed, 61 insertions(+) Index: linux-2.6-tip.hbkpt/arch/powerpc/include/asm/hw_breakpoint.h =================================================================== --- /dev/null +++ linux-2.6-tip.hbkpt/arch/powerpc/include/asm/hw_breakpoint.h @@ -0,0 +1,57 @@ +#ifndef _PPC64_HW_BREAKPOINT_H +#define _PPC64_HW_BREAKPOINT_H + +#ifdef __KERNEL__ +#define __ARCH_HW_BREAKPOINT_H +#ifdef CONFIG_PPC64 + +struct arch_hw_breakpoint { + char *name; /* Contains name of the symbol to set bkpt */ + unsigned long address; + u8 type; +}; + +#include +#include +#include + +#define HW_BREAKPOINT_READ DABR_DATA_READ +#define HW_BREAKPOINT_WRITE DABR_DATA_WRITE +#define HW_BREAKPOINT_RW (DABR_DATA_READ | DABR_DATA_WRITE) + +#define HW_BREAKPOINT_ALIGN 0x7 +#define HW_BREAKPOINT_LEN INSTRUCTION_LEN + +extern struct hw_breakpoint *hbp_kernel[HBP_NUM]; +DECLARE_PER_CPU(struct hw_breakpoint*, this_hbp_kernel[HBP_NUM]); +extern unsigned int hbp_user_refcount[HBP_NUM]; + +extern void arch_install_thread_hw_breakpoint(struct task_struct *tsk); +extern void arch_uninstall_thread_hw_breakpoint(void); +extern int arch_validate_hwbkpt_settings(struct hw_breakpoint *bp, + struct task_struct *tsk); +extern void arch_update_user_hw_breakpoint(int pos, struct task_struct *tsk); +extern void arch_flush_thread_hw_breakpoint(struct task_struct *tsk); +extern void arch_update_kernel_hw_breakpoint(void *); +extern int hw_breakpoint_exceptions_notify(struct notifier_block *unused, + unsigned long val, void *data); + +extern void flush_thread_hw_breakpoint(struct task_struct *tsk); +extern int copy_thread_hw_breakpoint(struct task_struct *tsk, + struct task_struct *child, unsigned long clone_flags); +extern void load_debug_registers(void ); + +static inline void hw_breakpoint_disable(void) +{ + set_dabr(0); +} + +#else +static inline void hw_breakpoint_disable(void) +{ + /* Function is defined only on PPC64 for now */ +} +#endif /* CONFIG_PPC64 */ +#endif /* __KERNEL__ */ +#endif /* _PPC64_HW_BREAKPOINT_H */ + Index: linux-2.6-tip.hbkpt/arch/powerpc/include/asm/processor.h =================================================================== --- linux-2.6-tip.hbkpt.orig/arch/powerpc/include/asm/processor.h +++ linux-2.6-tip.hbkpt/arch/powerpc/include/asm/processor.h @@ -177,6 +177,7 @@ struct thread_struct { #ifdef CONFIG_PPC64 unsigned long start_tb; /* Start purr when proc switched in */ unsigned long accum_tb; /* Total accumilated purr for process */ + struct hw_breakpoint *hbp[HBP_NUM]; #endif unsigned long dabr; /* Data address breakpoint register */ #ifdef CONFIG_ALTIVEC Index: linux-2.6-tip.hbkpt/arch/powerpc/include/asm/reg.h =================================================================== --- linux-2.6-tip.hbkpt.orig/arch/powerpc/include/asm/reg.h +++ linux-2.6-tip.hbkpt/arch/powerpc/include/asm/reg.h @@ -26,6 +26,8 @@ #include #endif /* CONFIG_8xx */ +#define INSTRUCTION_LEN 4 /* Length of any instruction */ + #define MSR_SF_LG 63 /* Enable 64 bit mode */ #define MSR_ISF_LG 61 /* Interrupt 64b mode valid on 630 */ #define MSR_HV_LG 60 /* Hypervisor state */ @@ -184,6 +186,7 @@ #define CTRL_TE 0x00c00000 /* thread enable */ #define CTRL_RUNLATCH 0x1 #define SPRN_DABR 0x3F5 /* Data Address Breakpoint Register */ +#define HBP_NUM 1 /* Number of physical HW breakpoint registers */ #define DABR_TRANSLATION (1UL << 2) #define DABR_DATA_WRITE (1UL << 1) #define DABR_DATA_READ (1UL << 0)