@@ -260,10 +260,21 @@
};
par_io@e0100 {
+ #address-cells = <1>;
+ #size-cells = <1>;
reg = <0xe0100 0x100>;
+ ranges = <0x0 0xe0100 0x100>;
device_type = "par_io";
num-ports = <7>;
+ qe_pio_e: gpio-controller@80 {
+ #gpio-cells = <2>;
+ compatible = "fsl,mpc8569-qe-pario-bank",
+ "fsl,mpc8323-qe-pario-bank";
+ reg = <0x80 0x18>;
+ gpio-controller;
+ };
+
pio1: ucc_pin@01 {
pio-map = <
/* port pin dir open_drain assignment has_irq */
@@ -369,12 +380,21 @@
};
spi@4c0 {
- cell-index = <0>;
- compatible = "fsl,spi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,mpc8569-qe-spi", "fsl,spi";
reg = <0x4c0 0x40>;
+ cell-index = <0>;
interrupts = <2>;
interrupt-parent = <&qeic>;
- mode = "cpu";
+ gpios = <&qe_pio_e 30 0>;
+ mode = "cpu-qe";
+
+ serial-flash@0 {
+ compatible = "stm,m25p40";
+ reg = <0>;
+ spi-max-frequency = <25000000>;
+ };
};
spi@500 {
@@ -447,6 +447,7 @@ struct of_modalias_table {
static struct of_modalias_table of_modalias_table[] = {
{ "fsl,mcu-mpc8349emitx", "mcu-mpc8349emitx" },
{ "mmc-spi-slot", "mmc_spi" },
+ { "stm,m25p40", "m25p80" },
};
/**
For serial flash support we need to: - Add QE Par IO Bank E device tree node, a GPIO from this bank is used for SPI chip-select line; - Add serial-flash node; - Add proper module alias into of/base.c. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> --- arch/powerpc/boot/dts/mpc8569mds.dts | 26 +++++++++++++++++++++++--- drivers/of/base.c | 1 + 2 files changed, 24 insertions(+), 3 deletions(-)