| Message ID | 1602154329-2092-3-git-send-email-atrajeev@linux.vnet.ibm.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | powerpc/perf: Power PMU fixes for power10 DD1 | expand |
| Context | Check | Description |
|---|---|---|
| snowpatch_ozlabs/apply_patch | success | Successfully applied on branch powerpc/merge (d1def5df359f3f1882cc29d8baa5cd2a4861a6c6) |
| snowpatch_ozlabs/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 15 lines checked |
| snowpatch_ozlabs/needsstable | success | Patch has no Fixes tags |
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c index 08643cb..d766090 100644 --- a/arch/powerpc/perf/core-book3s.c +++ b/arch/powerpc/perf/core-book3s.c @@ -350,7 +350,14 @@ static inline int siar_valid(struct pt_regs *regs) int marked = mmcra & MMCRA_SAMPLE_ENABLE; if (marked) { - if (ppmu->flags & PPMU_HAS_SIER) + /* + * SIER[SIAR_VALID] is not set for some + * marked events on power10 DD1, so use + * SIER[CMPL] instead. + */ + if (ppmu->flags & PPMU_P10_DD1) + return regs->dar & 0x1; + else if (ppmu->flags & PPMU_HAS_SIER) return regs->dar & SIER_SIAR_VALID; if (ppmu->flags & PPMU_SIAR_VALID)
On power10 DD1, there is an issue that causes the SIAR_VALID bit of Sampled Instruction Event Register(SIER) not to be set. But the SIAR_VALID bit is used for fetching the instruction address from Sampled Instruction Address Register(SIAR), and marked events are sampled only if the SIAR_VALID bit is set. So add a condition check for power10 DD1 to use SIER[CMPL] bit instead. Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com> --- arch/powerpc/perf/core-book3s.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-)