| Message ID | 1538592694-18739-4-git-send-email-mhairgrove@nvidia.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | f86ad3e0194b6964a058dc223ca80bf81b419cf0 |
| Headers | show |
| Series | powerpc/powernv/npu: Improve ATSD invalidation overhead | expand |
| Context | Check | Description |
|---|---|---|
| snowpatch_ozlabs/apply_patch | success | next/apply_patch Successfully applied |
| snowpatch_ozlabs/checkpatch | success | Test checkpatch on branch next |
| snowpatch_ozlabs/build-ppc64le | warning | Test build-ppc64le on branch next |
| snowpatch_ozlabs/build-ppc64be | warning | Test build-ppc64be on branch next |
| snowpatch_ozlabs/build-ppc64e | success | Test build-ppc64e on branch next |
| snowpatch_ozlabs/build-ppc32 | success | Test build-ppc32 on branch next |
Reviewed-by: Alistair Popple <alistair@popple.id.au> On Wednesday, 3 October 2018 11:51:34 AM AEST Mark Hairgrove wrote: > This threshold is no longer used now that all invalidates issue a single > ATSD to each active NPU. > > Signed-off-by: Mark Hairgrove <mhairgrove@nvidia.com> > --- > arch/powerpc/platforms/powernv/npu-dma.c | 14 -------------- > 1 files changed, 0 insertions(+), 14 deletions(-) > > diff --git a/arch/powerpc/platforms/powernv/npu-dma.c b/arch/powerpc/platforms/powernv/npu-dma.c > index e4c0fab..6f60e09 100644 > --- a/arch/powerpc/platforms/powernv/npu-dma.c > +++ b/arch/powerpc/platforms/powernv/npu-dma.c > @@ -17,7 +17,6 @@ > #include <linux/pci.h> > #include <linux/memblock.h> > #include <linux/iommu.h> > -#include <linux/debugfs.h> > #include <linux/sizes.h> > > #include <asm/debugfs.h> > @@ -43,14 +42,6 @@ > static DEFINE_SPINLOCK(npu_context_lock); > > /* > - * When an address shootdown range exceeds this threshold we invalidate the > - * entire TLB on the GPU for the given PID rather than each specific address in > - * the range. > - */ > -static uint64_t atsd_threshold = 2 * 1024 * 1024; > -static struct dentry *atsd_threshold_dentry; > - > -/* > * Other types of TCE cache invalidation are not functional in the > * hardware. > */ > @@ -966,11 +957,6 @@ int pnv_npu2_init(struct pnv_phb *phb) > static int npu_index; > uint64_t rc = 0; > > - if (!atsd_threshold_dentry) { > - atsd_threshold_dentry = debugfs_create_x64("atsd_threshold", > - 0600, powerpc_debugfs_root, &atsd_threshold); > - } > - > phb->npu.nmmu_flush = > of_property_read_bool(phb->hose->dn, "ibm,nmmu-flush"); > for_each_child_of_node(phb->hose->dn, dn) { >
diff --git a/arch/powerpc/platforms/powernv/npu-dma.c b/arch/powerpc/platforms/powernv/npu-dma.c index e4c0fab..6f60e09 100644 --- a/arch/powerpc/platforms/powernv/npu-dma.c +++ b/arch/powerpc/platforms/powernv/npu-dma.c @@ -17,7 +17,6 @@ #include <linux/pci.h> #include <linux/memblock.h> #include <linux/iommu.h> -#include <linux/debugfs.h> #include <linux/sizes.h> #include <asm/debugfs.h> @@ -43,14 +42,6 @@ static DEFINE_SPINLOCK(npu_context_lock); /* - * When an address shootdown range exceeds this threshold we invalidate the - * entire TLB on the GPU for the given PID rather than each specific address in - * the range. - */ -static uint64_t atsd_threshold = 2 * 1024 * 1024; -static struct dentry *atsd_threshold_dentry; - -/* * Other types of TCE cache invalidation are not functional in the * hardware. */ @@ -966,11 +957,6 @@ int pnv_npu2_init(struct pnv_phb *phb) static int npu_index; uint64_t rc = 0; - if (!atsd_threshold_dentry) { - atsd_threshold_dentry = debugfs_create_x64("atsd_threshold", - 0600, powerpc_debugfs_root, &atsd_threshold); - } - phb->npu.nmmu_flush = of_property_read_bool(phb->hose->dn, "ibm,nmmu-flush"); for_each_child_of_node(phb->hose->dn, dn) {
This threshold is no longer used now that all invalidates issue a single ATSD to each active NPU. Signed-off-by: Mark Hairgrove <mhairgrove@nvidia.com> --- arch/powerpc/platforms/powernv/npu-dma.c | 14 -------------- 1 files changed, 0 insertions(+), 14 deletions(-)