From patchwork Thu Jun 14 00:28:59 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ram Pai X-Patchwork-Id: 929135 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 415l4K60l1z9s19 for ; Thu, 14 Jun 2018 10:34:25 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=us.ibm.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="arbUj5Eo"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 415l4K4H0MzF0Tj for ; Thu, 14 Jun 2018 10:34:25 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=us.ibm.com Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="arbUj5Eo"; dkim-atps=neutral X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:400d:c0d::241; helo=mail-qt0-x241.google.com; envelope-from=ram.n.pai@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=us.ibm.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="arbUj5Eo"; dkim-atps=neutral Received: from mail-qt0-x241.google.com (mail-qt0-x241.google.com [IPv6:2607:f8b0:400d:c0d::241]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 415kyT6lr6zDrph for ; Thu, 14 Jun 2018 10:29:21 +1000 (AEST) Received: by mail-qt0-x241.google.com with SMTP id i18-v6so4220305qtp.12 for ; Wed, 13 Jun 2018 17:29:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=70Pf0o+J7rlGjio5KtmID8EjV86WTb+nNAyRcHSXyIo=; b=arbUj5Eoxbp+ZAzmCBdc0WvaNIzIY1qkhr4GaUlbzMSbdXQZcatJ280fMB3SA+LHFb vWw2s0COZSrTAnup609+Up5YjmAclAVnteuf30aKhRGJeuqSbO/Hi1W43pQPSns0+oMh be4bX2st618TywZGusgVMpHUFvoPsjNMrpM6mjLljMaVMi4ys6/FV85fG3b9vOeJubiS hxnq5asqtWgxydQxGAtFs40pZVrl0w03dGS1UuCG1Ts0BCl021HBAhR33v8tccvfzAbC LTKabgV0OZiEgYhUOubQeFlFWb8grXcc7ojv1T2jiG1JxzyVSWEq8vHfF5+Qq19+Zbuc JvGw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=70Pf0o+J7rlGjio5KtmID8EjV86WTb+nNAyRcHSXyIo=; b=EQUG3RQ0QTNVlo+JgyFGdFBu/LMWZTEPGEf7eMmSOugGnN16qG73ic95tImUpxNRG1 OuNxHQksM49uHqYOnrBKceiwcGFH9CS9C/zjCjvh13Mys/neK69FSX3T0yXZiu8J5Dlj 6iFIB8MaVs2RexmBOHptEBhoWqRy2RD/WoGSiD8/TA1qoUF4yiighcmgSrHk/rYRNFVo Qo3uXls8XYQH8ZqGBLsAfwVgWEOusBS+fly2ymDeUqBDhkWxFuV/tMbRIeCghuC7U0vP xvjKEnpUgDKJKKyyPu4RkWVd7kXiGUEw5Vaj3AP746blJMpnW1lvPRzfakoIe7hfPKP1 PyAA== X-Gm-Message-State: APt69E3UqzryjbZnojcJt20tEdhcMVvUxLz0sMftjk0mS+BT8AQT+vpV X1bO+EmtGlGliWpGg4s+P84= X-Google-Smtp-Source: ADUXVKL5ec0WVbsnhw+c/CozZN3Uv1Oks56XSHnb3gBgOKbhVSRNMu7BMWWUTfWhSSNxdl/QTS/eKg== X-Received: by 2002:ac8:1745:: with SMTP id u5-v6mr370184qtk.50.1528936159780; Wed, 13 Jun 2018 17:29:19 -0700 (PDT) Received: from localhost.localdomain (50-39-100-161.bvtn.or.frontiernet.net. [50.39.100.161]) by smtp.gmail.com with ESMTPSA id s12-v6sm3159581qkl.65.2018.06.13.17.29.17 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 13 Jun 2018 17:29:19 -0700 (PDT) From: Ram Pai To: mpe@ellerman.id.au Subject: [PATCH v2 1/6] powerpc/pkeys: Enable all user-allocatable pkeys at init. Date: Wed, 13 Jun 2018 17:28:59 -0700 Message-Id: <1528936144-6696-2-git-send-email-linuxram@us.ibm.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1528936144-6696-1-git-send-email-linuxram@us.ibm.com> References: <1528936144-6696-1-git-send-email-linuxram@us.ibm.com> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: fweimer@redhat.com, Ulrich.Weigand@de.ibm.com, linuxram@us.ibm.com, mhocko@kernel.org, dave.hansen@intel.com, aneesh.kumar@linux.vnet.ibm.com, luto@kernel.org, bauerman@linux.vnet.ibm.com, msuchanek@suse.de, linuxppc-dev@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" In a multithreaded application, a key allocated by one thread must be activate and usable on all threads. Currently this is not the case, because the UAMOR bits for all keys are disabled by default. When a new key is allocated in one thread, though the corresponding UAMOR bits for that thread get enabled, the UAMOR bits for all other existing threads continue to have their bits disabled. Other threads have no way to set permissions on the key, effectively making the key useless. Enable the UAMOR bits for all keys, at process creation. Since the contents of UAMOR are inherited at fork, all threads are capable of modifying the permissions on any key. BTW: changing the permission on unallocated keys has no effect, till those keys are not associated with any PTEs. The kernel will anyway disallow to association of unallocated keys with PTEs. CC: Andy Lutomirski CC: Florian Weimer CC: Thiago Jung Bauermann CC: Michael Ellerman Signed-off-by: Ram Pai --- arch/powerpc/mm/pkeys.c | 40 ++++++++++++++++++++++------------------ 1 files changed, 22 insertions(+), 18 deletions(-) diff --git a/arch/powerpc/mm/pkeys.c b/arch/powerpc/mm/pkeys.c index e6f500f..6529f4e 100644 --- a/arch/powerpc/mm/pkeys.c +++ b/arch/powerpc/mm/pkeys.c @@ -15,8 +15,9 @@ int pkeys_total; /* Total pkeys as per device tree */ bool pkeys_devtree_defined; /* pkey property exported by device tree */ u32 initial_allocation_mask; /* Bits set for reserved keys */ -u64 pkey_amr_uamor_mask; /* Bits in AMR/UMOR not to be touched */ +u64 pkey_amr_mask; /* Bits in AMR not to be touched */ u64 pkey_iamr_mask; /* Bits in AMR not to be touched */ +u64 pkey_uamor_mask; /* Bits in UMOR not to be touched */ #define AMR_BITS_PER_PKEY 2 #define AMR_RD_BIT 0x1UL @@ -119,20 +120,22 @@ int pkey_initialize(void) #else os_reserved = 0; #endif - initial_allocation_mask = ~0x0; - pkey_amr_uamor_mask = ~0x0ul; + initial_allocation_mask = (0x1 << 0) | (0x1 << 1); + + /* register mask is in BE format */ + pkey_amr_mask = ~0x0ul; pkey_iamr_mask = ~0x0ul; - /* - * key 0, 1 are reserved. - * key 0 is the default key, which allows read/write/execute. - * key 1 is recommended not to be used. PowerISA(3.0) page 1015, - * programming note. - */ - for (i = 2; i < (pkeys_total - os_reserved); i++) { - initial_allocation_mask &= ~(0x1 << i); - pkey_amr_uamor_mask &= ~(0x3ul << pkeyshift(i)); + + for (i = 0; i < (pkeys_total - os_reserved); i++) { + pkey_amr_mask &= ~(0x3ul << pkeyshift(i)); pkey_iamr_mask &= ~(0x1ul << pkeyshift(i)); } + + pkey_uamor_mask = ~0x0ul; + pkey_uamor_mask &= ~(0x3ul << pkeyshift(0)); + for (i = (pkeys_total - os_reserved); i < pkeys_total; i++) + pkey_uamor_mask &= ~(0x3ul << pkeyshift(i)); + return 0; } @@ -289,9 +292,6 @@ void thread_pkey_regs_restore(struct thread_struct *new_thread, if (static_branch_likely(&pkey_disabled)) return; - /* - * TODO: Just set UAMOR to zero if @new_thread hasn't used any keys yet. - */ if (old_thread->amr != new_thread->amr) write_amr(new_thread->amr); if (old_thread->iamr != new_thread->iamr) @@ -305,9 +305,13 @@ void thread_pkey_regs_init(struct thread_struct *thread) if (static_branch_likely(&pkey_disabled)) return; - thread->amr = read_amr() & pkey_amr_uamor_mask; - thread->iamr = read_iamr() & pkey_iamr_mask; - thread->uamor = read_uamor() & pkey_amr_uamor_mask; + thread->amr = pkey_amr_mask; + thread->iamr = pkey_iamr_mask; + thread->uamor = pkey_uamor_mask; + + write_uamor(pkey_uamor_mask); + write_amr(pkey_amr_mask); + write_iamr(pkey_iamr_mask); } static inline bool pkey_allows_readwrite(int pkey)