| Message ID | 1502233622-9330-3-git-send-email-sukadev@linux.vnet.ibm.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com> writes: > Move the GET_FIELD and SET_FIELD macros to vas.h as VAS and other > users of VAS, including NX-842 can use those macros. > > There is a lot of related code between the VAS/NX kernel drivers > and skiboot. For consistency switch the order of parameters in > SET_FIELD to match the order in skiboot. > > Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com> > Reviewed-by: Dan Streetman <ddstreet@ieee.org> > diff --git a/arch/powerpc/include/uapi/asm/vas.h b/arch/powerpc/include/uapi/asm/vas.h > index ddfe046..21249f5 100644 > --- a/arch/powerpc/include/uapi/asm/vas.h > +++ b/arch/powerpc/include/uapi/asm/vas.h > @@ -22,4 +22,12 @@ > #define VAS_THRESH_FIFO_GT_QTR_FULL 2 > #define VAS_THRESH_FIFO_GT_EIGHTH_FULL 3 > > +/* > + * Get/Set bit fields > + */ > +#define GET_FIELD(m, v) (((v) & (m)) >> MASK_LSH(m)) > +#define MASK_LSH(m) (__builtin_ffsl(m) - 1) > +#define SET_FIELD(m, v, val) \ > + (((v) & ~(m)) | ((((typeof(v))(val)) << MASK_LSH(m)) & (m))) This has no business being in a uapi header for VAS. Put it in asm/vas.h if you must. Personally I really dislike these sort of macros because they completely obscure what the final value should end up being, and it's the final value you'll see when you're debugging it. > + ccw = SET_FIELD(CCW_CT, ccw, nx842_ct); > + ccw = SET_FIELD(CCW_CI_842, ccw, 0); /* use 0 for hw auto-selection */ > + ccw = SET_FIELD(CCW_FC_842, ccw, fc); eg. that could also be written: ccw = (nx842_ct << 16) | (fc & 7); cheers
diff --git a/arch/powerpc/include/uapi/asm/vas.h b/arch/powerpc/include/uapi/asm/vas.h index ddfe046..21249f5 100644 --- a/arch/powerpc/include/uapi/asm/vas.h +++ b/arch/powerpc/include/uapi/asm/vas.h @@ -22,4 +22,12 @@ #define VAS_THRESH_FIFO_GT_QTR_FULL 2 #define VAS_THRESH_FIFO_GT_EIGHTH_FULL 3 +/* + * Get/Set bit fields + */ +#define GET_FIELD(m, v) (((v) & (m)) >> MASK_LSH(m)) +#define MASK_LSH(m) (__builtin_ffsl(m) - 1) +#define SET_FIELD(m, v, val) \ + (((v) & ~(m)) | ((((typeof(v))(val)) << MASK_LSH(m)) & (m))) + #endif /* _UAPI_MISC_VAS_H */ diff --git a/drivers/crypto/nx/nx-842-powernv.c b/drivers/crypto/nx/nx-842-powernv.c index 1710f80..3abb045 100644 --- a/drivers/crypto/nx/nx-842-powernv.c +++ b/drivers/crypto/nx/nx-842-powernv.c @@ -22,6 +22,7 @@ #include <asm/prom.h> #include <asm/icswx.h> +#include <asm/vas.h> MODULE_LICENSE("GPL"); MODULE_AUTHOR("Dan Streetman <ddstreet@ieee.org>"); @@ -424,9 +425,9 @@ static int nx842_powernv_function(const unsigned char *in, unsigned int inlen, /* set up CCW */ ccw = 0; - ccw = SET_FIELD(ccw, CCW_CT, nx842_ct); - ccw = SET_FIELD(ccw, CCW_CI_842, 0); /* use 0 for hw auto-selection */ - ccw = SET_FIELD(ccw, CCW_FC_842, fc); + ccw = SET_FIELD(CCW_CT, ccw, nx842_ct); + ccw = SET_FIELD(CCW_CI_842, ccw, 0); /* use 0 for hw auto-selection */ + ccw = SET_FIELD(CCW_FC_842, ccw, fc); /* set up CRB's CSB addr */ csb_addr = nx842_get_pa(csb) & CRB_CSB_ADDRESS; diff --git a/drivers/crypto/nx/nx-842.h b/drivers/crypto/nx/nx-842.h index a4eee3b..30929bd 100644 --- a/drivers/crypto/nx/nx-842.h +++ b/drivers/crypto/nx/nx-842.h @@ -100,11 +100,6 @@ static inline unsigned long nx842_get_pa(void *addr) return page_to_phys(vmalloc_to_page(addr)) + offset_in_page(addr); } -/* Get/Set bit fields */ -#define MASK_LSH(m) (__builtin_ffsl(m) - 1) -#define GET_FIELD(v, m) (((v) & (m)) >> MASK_LSH(m)) -#define SET_FIELD(v, m, val) (((v) & ~(m)) | (((val) << MASK_LSH(m)) & (m))) - /** * This provides the driver's constraints. Different nx842 implementations * may have varying requirements. The constraints are: