From patchwork Thu Mar 16 10:37:12 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Aneesh Kumar K.V" X-Patchwork-Id: 739775 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3vkQYx6Mksz9rxw for ; Thu, 16 Mar 2017 22:03:17 +1100 (AEDT) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3vkQYx5YhCzDrBv for ; Thu, 16 Mar 2017 22:03:17 +1100 (AEDT) X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3vkQ0g0WGgzDqkr for ; Thu, 16 Mar 2017 21:37:54 +1100 (AEDT) Received: from pps.filterd (m0098416.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.20/8.16.0.20) with SMTP id v2GAYcgp088090 for ; Thu, 16 Mar 2017 06:37:50 -0400 Received: from e19.ny.us.ibm.com (e19.ny.us.ibm.com [129.33.205.209]) by mx0b-001b2d01.pphosted.com with ESMTP id 297s1y067w-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Thu, 16 Mar 2017 06:37:50 -0400 Received: from localhost by e19.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Thu, 16 Mar 2017 06:37:45 -0400 Received: from b01ledav001.gho.pok.ibm.com (b01ledav001.gho.pok.ibm.com [9.57.199.106]) by b01cxnp22035.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id v2GAbj8160620834; Thu, 16 Mar 2017 10:37:45 GMT Received: from b01ledav001.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 66DB228046; Thu, 16 Mar 2017 06:37:43 -0400 (EDT) Received: from skywalker.in.ibm.com (unknown [9.124.35.129]) by b01ledav001.gho.pok.ibm.com (Postfix) with ESMTP id CC1DC2803D; Thu, 16 Mar 2017 06:37:41 -0400 (EDT) From: "Aneesh Kumar K.V" To: benh@kernel.crashing.org, paulus@samba.org, mpe@ellerman.id.au Subject: [PATCH V4 13/14] powerpc/mm/hash64: Store task size in PACA Date: Thu, 16 Mar 2017 16:07:12 +0530 X-Mailer: git-send-email 2.7.4 In-Reply-To: <1489660633-24125-1-git-send-email-aneesh.kumar@linux.vnet.ibm.com> References: <1489660633-24125-1-git-send-email-aneesh.kumar@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 17031610-0056-0000-0000-0000030F0EE4 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00006792; HX=3.00000240; KW=3.00000007; PH=3.00000004; SC=3.00000206; SDB=6.00834597; UDB=6.00409881; IPR=6.00612252; BA=6.00005214; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00014671; XFM=3.00000013; UTC=2017-03-16 10:37:47 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17031610-0057-0000-0000-000007450E09 Message-Id: <1489660633-24125-14-git-send-email-aneesh.kumar@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-03-16_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1702020001 definitions=main-1703160085 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linuxppc-dev@lists.ozlabs.org, "Aneesh Kumar K.V" Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" We can optmize the slice page size array copy to paca by copying only the range based on task size. This will require us to not look at page size array beyond task size in PACA on slb fault. To enable that copy task size to paca which will be used during slb fault. We can take slb fault on an mm even before we set the task_size in setup_new_exec. To make sure our paca have the details of default page size, init the mm->task_size with max value early. Later we will adjust this based on task personality. Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/include/asm/paca.h | 4 +++- arch/powerpc/kernel/asm-offsets.c | 4 ++++ arch/powerpc/kernel/paca.c | 1 + arch/powerpc/mm/slb_low.S | 8 +++++++- 4 files changed, 15 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/include/asm/paca.h b/arch/powerpc/include/asm/paca.h index f48c250339fd..25f4a1c14759 100644 --- a/arch/powerpc/include/asm/paca.h +++ b/arch/powerpc/include/asm/paca.h @@ -144,7 +144,9 @@ struct paca_struct { u16 mm_ctx_sllp; #endif #endif - +#ifdef CONFIG_PPC_STD_MMU_64 + u64 task_size; +#endif /* * then miscellaneous read-write fields */ diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c index 4367e7df51a1..a60ef1d976ab 100644 --- a/arch/powerpc/kernel/asm-offsets.c +++ b/arch/powerpc/kernel/asm-offsets.c @@ -189,6 +189,10 @@ int main(void) #endif /* CONFIG_PPC_MM_SLICES */ #endif +#ifdef CONFIG_PPC_STD_MMU_64 + DEFINE(PACATASKSIZE, offsetof(struct paca_struct, task_size)); +#endif + #ifdef CONFIG_PPC_BOOK3E OFFSET(PACAPGD, paca_struct, pgd); OFFSET(PACA_KERNELPGD, paca_struct, kernel_pgd); diff --git a/arch/powerpc/kernel/paca.c b/arch/powerpc/kernel/paca.c index bffdbd6d6774..50b60e23d07f 100644 --- a/arch/powerpc/kernel/paca.c +++ b/arch/powerpc/kernel/paca.c @@ -254,6 +254,7 @@ void copy_mm_to_paca(struct mm_struct *mm) get_paca()->mm_ctx_id = context->id; #ifdef CONFIG_PPC_MM_SLICES VM_BUG_ON(!mm->task_size); + get_paca()->task_size = mm->task_size; get_paca()->mm_ctx_low_slices_psize = context->low_slices_psize; memcpy(&get_paca()->mm_ctx_high_slices_psize, &context->high_slices_psize, TASK_SLICE_ARRAY_SZ(mm)); diff --git a/arch/powerpc/mm/slb_low.S b/arch/powerpc/mm/slb_low.S index 35e91e89640f..b09e7748856f 100644 --- a/arch/powerpc/mm/slb_low.S +++ b/arch/powerpc/mm/slb_low.S @@ -149,7 +149,13 @@ END_MMU_FTR_SECTION_IFCLR(MMU_FTR_1T_SEGMENT) * For userspace addresses, make sure this is region 0. */ cmpdi r9, 0 - bne 8f + bne- 8f + /* + * user space make sure we are within the allowed limit + */ + ld r11,PACATASKSIZE(r13) + cmpld r3,r11 + bge- 8f /* when using slices, we extract the psize off the slice bitmaps * and then we need to get the sllp encoding off the mmu_psize_defs