From patchwork Thu Oct 8 14:47:37 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshuman Khandual X-Patchwork-Id: 527771 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 21E34140E3A for ; Fri, 9 Oct 2015 02:11:59 +1100 (AEDT) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 025251A17EB for ; Fri, 9 Oct 2015 02:11:59 +1100 (AEDT) X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Received: from ozlabs.org (ozlabs.org [103.22.144.67]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id B153A1A022E for ; Fri, 9 Oct 2015 01:50:20 +1100 (AEDT) Received: by ozlabs.org (Postfix) id 9C6DB140DEF; Fri, 9 Oct 2015 01:50:20 +1100 (AEDT) Delivered-To: linuxppc-dev@ozlabs.org Received: from e23smtp03.au.ibm.com (e23smtp03.au.ibm.com [202.81.31.145]) (using TLSv1 with cipher CAMELLIA256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 72604140E0F for ; Fri, 9 Oct 2015 01:50:20 +1100 (AEDT) Received: from /spool/local by e23smtp03.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Fri, 9 Oct 2015 00:50:18 +1000 X-Helo: d23dlp03.au.ibm.com X-MailFrom: khandual@linux.vnet.ibm.com X-RcptTo: linuxppc-dev@ozlabs.org Received: from d23relay08.au.ibm.com (d23relay08.au.ibm.com [9.185.71.33]) by d23dlp03.au.ibm.com (Postfix) with ESMTP id EE5F13578052 for ; Fri, 9 Oct 2015 01:50:17 +1100 (EST) Received: from d23av01.au.ibm.com (d23av01.au.ibm.com [9.190.234.96]) by d23relay08.au.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id t98EnwQ652101300 for ; Fri, 9 Oct 2015 01:50:06 +1100 Received: from d23av01.au.ibm.com (localhost [127.0.0.1]) by d23av01.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id t98EnhNN008011 for ; Fri, 9 Oct 2015 01:49:45 +1100 Received: from localhost.in.ibm.com ([9.124.158.120]) by d23av01.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id t98Em6Ob004883; Fri, 9 Oct 2015 01:49:37 +1100 From: Anshuman Khandual To: linux-kernel@vger.kernel.org, linuxppc-dev@ozlabs.org Subject: [PATCH V9 16/28] selftests, powerpc: Add more SPR numbers, TM & VMX instructions to 'reg.h' Date: Thu, 8 Oct 2015 20:17:37 +0530 Message-Id: <1444315669-23487-17-git-send-email-khandual@linux.vnet.ibm.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1444315669-23487-1-git-send-email-khandual@linux.vnet.ibm.com> References: <1444315669-23487-1-git-send-email-khandual@linux.vnet.ibm.com> X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 15100814-0009-0000-0000-00000228DE9A X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: shuahkh@osg.samsung.com, mikey@neuling.org, james.hogan@imgtec.com, avagin@openvz.org, Paul.Clothier@imgtec.com, peterz@infradead.org, palves@redhat.com, emachado@linux.vnet.ibm.com, oleg@redhat.com, davem@davemloft.net, dhowells@redhat.com, Ulrich.Weigand@de.ibm.com, kirjanov@gmail.com, davej@redhat.com, akpm@linux-foundation.org, sukadev@linux.vnet.ibm.com, tglx@linutronix.de, sam.bobroff@au1.ibm.com MIME-Version: 1.0 Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" This patch adds SPR number for TAR, PPR, DSCR special purpose registers. It also adds TM, VSX, VMX related instructions which will then be used by patches later in the series. Signed-off-by: Anshuman Khandual --- tools/testing/selftests/powerpc/reg.h | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/tools/testing/selftests/powerpc/reg.h b/tools/testing/selftests/powerpc/reg.h index 5921b0d..76f170d 100644 --- a/tools/testing/selftests/powerpc/reg.h +++ b/tools/testing/selftests/powerpc/reg.h @@ -18,6 +18,19 @@ #define mb() asm volatile("sync" : : : "memory"); +/* Vector Instructions */ +#define VSX_XX1(xs, ra, rb) (((xs) & 0x1f) << 21 | ((ra) << 16) | \ + ((rb) << 11) | (((xs) >> 5))) +#define STXVD2X(xs, ra, rb) .long (0x7c000798 | VSX_XX1((xs), (ra), (rb))) +#define LXVD2X(xs, ra, rb) .long (0x7c000698 | VSX_XX1((xs), (ra), (rb))) + +/* TM instructions */ +#define TBEGIN ".long 0x7C00051D;" +#define TABORT ".long 0x7C00071D;" +#define TEND ".long 0x7C00055D;" +#define TSUSPEND ".long 0x7C0005DD;" +#define TRESUME ".long 0x7C2005DD;" + #define SPRN_MMCR2 769 #define SPRN_MMCRA 770 #define SPRN_MMCR0 779 @@ -46,4 +59,12 @@ #define SPRN_SDAR 781 #define SPRN_SIER 768 +#define SPRN_DSCR 3 /* Data Stream Control Register */ +#define SPRN_TAR 815 /* Target Address Register */ +#define SPRN_PPR 896 /* Program Priority Register */ + +#define SPRN_TFHAR 0x80 /* TM Failure Handle Register */ +#define SPRN_TFIAR 0x81 /* TM Failure Instruction Address Register */ +#define SPRN_TEXASR 0x82 /* TM Exception and Status Register */ + #endif /* _SELFTESTS_POWERPC_REG_H */