From patchwork Fri Aug 28 02:48:15 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Boqun Feng X-Patchwork-Id: 511773 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 82ABC14016A for ; Fri, 28 Aug 2015 16:29:35 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=eT+CysMV; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 4DA351A2759 for ; Fri, 28 Aug 2015 16:29:35 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=eT+CysMV; dkim-atps=neutral X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Received: from mail-io0-x22c.google.com (mail-io0-x22c.google.com [IPv6:2607:f8b0:4001:c06::22c]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id D40D51A01ED for ; Fri, 28 Aug 2015 12:48:47 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=eT+CysMV; dkim-atps=neutral Received: by iodv127 with SMTP id v127so78990491iod.3 for ; Thu, 27 Aug 2015 19:48:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Tklv+pSgkvr+zlduOthqodMCwO77M09DTnV++TdqUpw=; b=eT+CysMVYCO+2YFid7jzxdiytcttyQ/wi/qi8jULTgHUtf/t4ObC9uYhpPzxLvXOdW dvNJ2egVTjKNRGo0mwcbCdDBp4A1KnbuYDlokDcCHfTwM5POK+/IcbwSbJxwOZyln5Ta iM18H07e3OSQ7jdq/zW6hRJadG1gBGnfGkCZgJx3OekilFuXpKznLmeyn8FThlWH+B+d b0GqnpWpz/nRLB1RIqzilLGDWQytWm5hhBogfLktjgTV5xS41Y0NShx36uwx+LZwYjxG 4qa+JfBqI+SGgXJeFhhKT22O3f0S3qQn72PHm2iy8efvMReFG/HdWdP9AaqGUW769NJT AC6A== X-Received: by 10.107.156.12 with SMTP id f12mr99104ioe.135.1440730125751; Thu, 27 Aug 2015 19:48:45 -0700 (PDT) Received: from localhost (vm.fixme.name. [192.157.208.129]) by smtp.gmail.com with ESMTPSA id vk8sm883403igb.4.2015.08.27.19.48.43 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 27 Aug 2015 19:48:44 -0700 (PDT) From: Boqun Feng To: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Subject: [RFC 1/5] atomics: add test for atomic operations with _relaxed variants Date: Fri, 28 Aug 2015 10:48:15 +0800 Message-Id: <1440730099-29133-2-git-send-email-boqun.feng@gmail.com> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1440730099-29133-1-git-send-email-boqun.feng@gmail.com> References: <1440730099-29133-1-git-send-email-boqun.feng@gmail.com> X-Mailman-Approved-At: Fri, 28 Aug 2015 16:26:40 +1000 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Waiman Long , Peter Zijlstra , Boqun Feng , Will Deacon , Paul Mackerras , Thomas Gleixner , "Paul E. McKenney" , Ingo Molnar MIME-Version: 1.0 Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" Some atomic operations now have _{relaxed, acquire, release} variants, this patch then adds some trivial tests for two purpose: 1. test the behavior of these new operations in single-CPU environment. 2. make their code generated before we actually use them somewhere, so that we can examine their assembly code. Signed-off-by: Boqun Feng --- lib/atomic64_test.c | 91 ++++++++++++++++++++++++++++++++++------------------- 1 file changed, 59 insertions(+), 32 deletions(-) diff --git a/lib/atomic64_test.c b/lib/atomic64_test.c index 83c33a5b..0484437 100644 --- a/lib/atomic64_test.c +++ b/lib/atomic64_test.c @@ -27,6 +27,50 @@ do { \ (unsigned long long)r); \ } while (0) +#define TEST_RETURN(bit, op, c_op, val) \ +do { \ + atomic##bit##_set(&v, v0); \ + r = v0; \ + r c_op val; \ + BUG_ON(atomic##bit##_##op(val, &v) != r); \ + BUG_ON(atomic##bit##_read(&v) != r); \ +} while (0) + +#define TEST_RETURN_FAMILY(bit, op, c_op, val) \ +do { \ + TEST_RETURN(bit, op, c_op, val); \ + TEST_RETURN(bit, op##_acquire, c_op, val); \ + TEST_RETURN(bit, op##_release, c_op, val); \ + TEST_RETURN(bit, op##_relaxed, c_op, val); \ +} while (0) + +#define TEST_ARGS(bit, op, init, ret, expect, args...) \ +do { \ + atomic##bit##_set(&v, init); \ + BUG_ON(atomic##bit##_##op(&v, args) != ret); \ + BUG_ON(atomic##bit##_read(&v) != expect); \ +} while (0) + +#define TEST_XCHG_FAMILY(bit, init, new) \ +do { \ + TEST_ARGS(bit, xchg, init, init, new, new); \ + TEST_ARGS(bit, xchg_acquire, init, init, new, new); \ + TEST_ARGS(bit, xchg_release, init, init, new, new); \ + TEST_ARGS(bit, xchg_relaxed, init, init, new, new); \ +} while (0) + +#define TEST_CMPXCHG_FAMILY(bit, init, new, wrong) \ +do { \ + TEST_ARGS(bit, cmpxchg, init, init, new, init, new); \ + TEST_ARGS(bit, cmpxchg, init, init, init, wrong, new); \ + TEST_ARGS(bit, cmpxchg_acquire, init, init, new, init, new); \ + TEST_ARGS(bit, cmpxchg_acquire, init, init, init, wrong, new); \ + TEST_ARGS(bit, cmpxchg_release, init, init, new, init, new); \ + TEST_ARGS(bit, cmpxchg_release, init, init, init, wrong, new); \ + TEST_ARGS(bit, cmpxchg_relaxed, init, init, new, init, new); \ + TEST_ARGS(bit, cmpxchg_relaxed, init, init, init, wrong, new); \ +} while (0) + static __init void test_atomic(void) { int v0 = 0xaaa31337; @@ -45,6 +89,15 @@ static __init void test_atomic(void) TEST(, and, &=, v1); TEST(, xor, ^=, v1); TEST(, andnot, &= ~, v1); + + TEST_RETURN_FAMILY(, add_return, +=, onestwos); + TEST_RETURN_FAMILY(, add_return, +=, -one); + TEST_RETURN_FAMILY(, sub_return, -=, onestwos); + TEST_RETURN_FAMILY(, sub_return, -=, -one); + + TEST_XCHG_FAMILY(, v0, v1); + TEST_CMPXCHG_FAMILY(, v0, v1, onestwos); + } #define INIT(c) do { atomic64_set(&v, c); r = c; } while (0) @@ -74,25 +127,10 @@ static __init void test_atomic64(void) TEST(64, xor, ^=, v1); TEST(64, andnot, &= ~, v1); - INIT(v0); - r += onestwos; - BUG_ON(atomic64_add_return(onestwos, &v) != r); - BUG_ON(v.counter != r); - - INIT(v0); - r += -one; - BUG_ON(atomic64_add_return(-one, &v) != r); - BUG_ON(v.counter != r); - - INIT(v0); - r -= onestwos; - BUG_ON(atomic64_sub_return(onestwos, &v) != r); - BUG_ON(v.counter != r); - - INIT(v0); - r -= -one; - BUG_ON(atomic64_sub_return(-one, &v) != r); - BUG_ON(v.counter != r); + TEST_RETURN_FAMILY(64, add_return, +=, onestwos); + TEST_RETURN_FAMILY(64, add_return, +=, -one); + TEST_RETURN_FAMILY(64, sub_return, -=, onestwos); + TEST_RETURN_FAMILY(64, sub_return, -=, -one); INIT(v0); atomic64_inc(&v); @@ -114,19 +152,8 @@ static __init void test_atomic64(void) BUG_ON(atomic64_dec_return(&v) != r); BUG_ON(v.counter != r); - INIT(v0); - BUG_ON(atomic64_xchg(&v, v1) != v0); - r = v1; - BUG_ON(v.counter != r); - - INIT(v0); - BUG_ON(atomic64_cmpxchg(&v, v0, v1) != v0); - r = v1; - BUG_ON(v.counter != r); - - INIT(v0); - BUG_ON(atomic64_cmpxchg(&v, v2, v1) != v0); - BUG_ON(v.counter != r); + TEST_XCHG_FAMILY(64, v0, v1); + TEST_CMPXCHG_FAMILY(64, v0, v1, v2); INIT(v0); BUG_ON(atomic64_add_unless(&v, one, v0));