From patchwork Wed Apr 8 07:43:51 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Igal.Liberman" X-Patchwork-Id: 459225 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 52B2C1401AD for ; Wed, 8 Apr 2015 21:54:48 +1000 (AEST) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 326DC1A0C85 for ; Wed, 8 Apr 2015 21:54:48 +1000 (AEST) X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Received: from na01-bn1-obe.outbound.protection.outlook.com (mail-bn1on0115.outbound.protection.outlook.com [157.56.110.115]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id B2DEF1A0515 for ; Wed, 8 Apr 2015 21:53:51 +1000 (AEST) Received: from BY2PR03CA068.namprd03.prod.outlook.com (10.141.249.41) by BLUPR03MB373.namprd03.prod.outlook.com (10.141.75.145) with Microsoft SMTP Server (TLS) id 15.1.136.17; Wed, 8 Apr 2015 11:53:37 +0000 Received: from BY2FFO11FD023.protection.gbl (2a01:111:f400:7c0c::161) by BY2PR03CA068.outlook.office365.com (2a01:111:e400:2c5d::41) with Microsoft SMTP Server (TLS) id 15.1.130.23 via Frontend Transport; Wed, 8 Apr 2015 11:53:36 +0000 Authentication-Results: spf=fail (sender IP is 192.88.158.2) smtp.mailfrom=freescale.com; freescale.mail.onmicrosoft.com; dkim=none (message not signed) header.d=none; Received-SPF: Fail (protection.outlook.com: domain of freescale.com does not designate 192.88.158.2 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.158.2; helo=az84smr01.freescale.net; Received: from az84smr01.freescale.net (192.88.158.2) by BY2FFO11FD023.mail.protection.outlook.com (10.1.15.212) with Microsoft SMTP Server (TLS) id 15.1.136.16 via Frontend Transport; Wed, 8 Apr 2015 11:53:36 +0000 Received: from b31950-Sun-Ultra-20-Workstation.fil.ea.freescale.net ([10.96.120.115]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id t38BrXvU015821; Wed, 8 Apr 2015 04:53:34 -0700 From: Igal.Liberman To: , Subject: [v2] dt/bindings: qoriq-clock: Add binding for FMan clock mux Date: Wed, 8 Apr 2015 10:43:51 +0300 Message-ID: <1428479031-26597-1-git-send-email-igal.liberman@freescale.com> X-Mailer: git-send-email 1.7.9.5 X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.158.2; CTRY:US; IPV:NLI; EFV:NLI; BMV:1; SFV:NSPM; SFS:(10019020)(6009001)(339900001)(199003)(189002)(77096005)(106466001)(92566002)(575784001)(47776003)(104016003)(50466002)(86362001)(36756003)(48376002)(19580405001)(85426001)(77156002)(19580395003)(6806004)(87936001)(33646002)(229853001)(62966003)(50226001)(105606002)(50986999)(46102003); DIR:OUT; SFP:1102; SCL:1; SRVR:BLUPR03MB373; H:az84smr01.freescale.net; FPR:; SPF:Fail; MLV:sfv; A:1; MX:1; LANG:en; MIME-Version: 1.0 X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BLUPR03MB373; X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(601004)(5002010)(5005006); SRVR:BLUPR03MB373; BCL:0; PCL:0; RULEID:; SRVR:BLUPR03MB373; X-Forefront-PRVS: 0540846A1D X-OriginatorOrg: freescale.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Apr 2015 11:53:36.3657 (UTC) X-MS-Exchange-CrossTenant-Id: 710a03f5-10f6-4d38-9ff4-a80b81da590d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=710a03f5-10f6-4d38-9ff4-a80b81da590d; Ip=[192.88.158.2]; Helo=[az84smr01.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BLUPR03MB373 Cc: scottwood@freescale.com, Igal Liberman X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" From: Igal Liberman v2: Addressed feedback from Scott: - Moved the "fman-clk-mux" clock provider details under "clocks" property. Signed-off-by: Igal Liberman --- .../devicetree/bindings/clock/qoriq-clock.txt | 63 +++++++++++++++++++- 1 file changed, 61 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/qoriq-clock.txt b/Documentation/devicetree/bindings/clock/qoriq-clock.txt index df4a259..4d63ac6 100644 --- a/Documentation/devicetree/bindings/clock/qoriq-clock.txt +++ b/Documentation/devicetree/bindings/clock/qoriq-clock.txt @@ -65,9 +65,10 @@ Required properties: It takes parent's clock-frequency as its clock. * "fsl,qoriq-platform-pll-1.0" for the platform PLL clock (v1.0) * "fsl,qoriq-platform-pll-2.0" for the platform PLL clock (v2.0) + * "fsl,fman-clk-mux" for the Frame Manager clock. - #clock-cells: From common clock binding. The number of cells in a - clock-specifier. Should be <0> for "fsl,qoriq-sysclk-[1,2].0" - clocks, or <1> for "fsl,qoriq-core-pll-[1,2].0" clocks. + clock-specifier. Should be <0> for "fsl,qoriq-sysclk-[1,2].0" and + "fsl,fman-clk-mux" clocks or <1> for "fsl,qoriq-core-pll-[1,2].0". For "fsl,qoriq-core-pll-[1,2].0" clocks, the single clock-specifier cell may take the following values: * 0 - equal to the PLL frequency @@ -76,6 +77,52 @@ Required properties: Recommended properties: - clocks: Should be the phandle of input parent clock + For "fsl,fman-clk-mux" clock there are several options for parent + clock (clock provider), the parent is determined according to the + Reset Configuration Word of the specific device: + * P2041, P3041: + * 0 - equal to platform PLL divided by 2 + * 1 - equal to PLL2 divided by 2 + * P4080 (Both FMans): + * 0 - equal to platform PLL divided by 2 + * 1 - equal to PLL3 divided by 2 + * P5020: + * 0 - equal to platform PLL divided by 2 + * 1 - equal to PLL2 divided by 2 + * 2 - equal to PLL2 divided by 4 + * P5040 (Both FMans): + * 0 - equal to platform PLL divided by 2 + * 1 - equal to PLL3 divided by 2 + * 2 - equal to PLL3 divided by 4 + * T1024: + * 0 - equal to PLL1 divided by 2 + * T1040: + * 0 - equal to platform PLL + * T2080, B4860, B4420: + * 0 - equal to PLL1 + * 1 - equal to PLL1 divided by 2 + * 2 - equal to PLL1 divided by 3 + * 3 - equal to PLL1 divided by 4 + * 4 - equal to platform PLL + * 5 - equal to PLL2 divided by 2 + * 6 - equal to PLL2 divided by 3 + * T4240: + * FM1: + * 0 equal to PLL1 divided by 2 + * 1 equal to PLL1 divided by 3 + * 2 equal to PLL1 divided by 4 + * 3 equal to platform PLL + * 4 equal to PLL2 divided by 2 + * FM2: + * 0 equal to PLL2 divided by 2 + * 1 equal to PLL2 divided by 3 + * 2 equal to PLL2 divided by 4 + * 3 equal to platform PLL + * 4 equal to PLL1 divided by 2 + * 5 equal to PLL1 divided by 3 + In Part of FMan V3 devices (B4, T2, T4) the single + clock-specifier cell may be determined by the CLKCGxHWACSR + register in addtion to RCW. - clock-names: From common clock binding, indicates the clock name - clock-output-names: From common clock binding, indicates the names of output clocks @@ -139,6 +186,18 @@ Example for clock block and clock provider: clocks = <&sysclk>; clock-output-names = "platform-pll", "platform-pll-div2"; }; + + fm0clk: fm0-clk-mux { + #clock-cells = <0>; + reg = <0x10 4> + compatible = "fsl,fman-clk-mux"; + clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>, <&pll0 3>, + <&platform_pll 0>, <&pll1 1>, <&pll1 2>; + clock-names = "pll0", "pll0-div2", "pll0-div3", + "pll0-div4", "platform-pll", "pll1-div2", + "pll1-div3"; + clock-output-names = "fm0-clk"; + }; }; };