From patchwork Tue Oct 7 10:48:17 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Neuling X-Patchwork-Id: 397224 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 07783140111 for ; Tue, 7 Oct 2014 22:02:05 +1100 (EST) Received: from ozlabs.org (ozlabs.org [103.22.144.67]) by lists.ozlabs.org (Postfix) with ESMTP id 41ACD1A1A35 for ; Tue, 7 Oct 2014 22:02:05 +1100 (EST) X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Received: from ozlabs.org (ozlabs.org [103.22.144.67]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 9DB881A1772 for ; Tue, 7 Oct 2014 21:49:38 +1100 (EST) Received: by ozlabs.org (Postfix) id 748A71400B7; Tue, 7 Oct 2014 21:49:38 +1100 (AEDT) Delivered-To: linuxppc-dev@ozlabs.org Received: from localhost.localdomain (localhost [127.0.0.1]) by ozlabs.org (Postfix) with ESMTP id 3F2801400DE; Tue, 7 Oct 2014 21:49:38 +1100 (EST) Received: by localhost.localdomain (Postfix, from userid 1000) id 45D66D433BE; Tue, 7 Oct 2014 21:49:37 +1100 (EST) From: Michael Neuling To: greg@kroah.com, arnd@arndb.de, mpe@ellerman.id.au, benh@kernel.crashing.org Subject: [PATCH v3 11/16] powerpc/mm: Add hooks for cxl Date: Tue, 7 Oct 2014 21:48:17 +1100 Message-Id: <1412678902-18672-12-git-send-email-mikey@neuling.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1412678902-18672-1-git-send-email-mikey@neuling.org> References: <1412678902-18672-1-git-send-email-mikey@neuling.org> Cc: cbe-oss-dev@lists.ozlabs.org, mikey@neuling.org, "Aneesh Kumar K.V" , imunsie@au.ibm.com, linux-kernel@vger.kernel.org, linuxppc-dev@ozlabs.org, jk@ozlabs.org, anton@samba.org X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" From: Ian Munsie This add a hook into tlbie() so that we use global invalidations when there are cxl contexts active. Normally cxl snoops broadcast tlbie. cxl can have TLB entries invalidated via MMIO, but we aren't doing that yet. So for now we are just disabling local tlbies when cxl contexts are active. In future we can make tlbie() local mode smarter so that it invalidates cxl contexts explicitly when it needs to. This also adds a hooks for when SLBs are invalidated to ensure any corresponding SLBs in cxl are also invalidated at the same time. Signed-off-by: Ian Munsie Signed-off-by: Michael Neuling --- arch/powerpc/mm/copro_fault.c | 2 ++ arch/powerpc/mm/hash_native_64.c | 6 +++++- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/mm/copro_fault.c b/arch/powerpc/mm/copro_fault.c index 222ef9b..55791fc 100644 --- a/arch/powerpc/mm/copro_fault.c +++ b/arch/powerpc/mm/copro_fault.c @@ -26,6 +26,7 @@ #include #include #include +#include /* * This ought to be kept in sync with the powerpc specific do_page_fault @@ -143,5 +144,6 @@ void copro_flush_all_slbs(struct mm_struct *mm) #ifdef CONFIG_SPU_BASE spu_flush_all_slbs(mm); #endif + cxl_slbia(mm); } EXPORT_SYMBOL_GPL(copro_flush_all_slbs); diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c index afc0a82..ae4962a 100644 --- a/arch/powerpc/mm/hash_native_64.c +++ b/arch/powerpc/mm/hash_native_64.c @@ -29,6 +29,8 @@ #include #include +#include + #ifdef DEBUG_LOW #define DBG_LOW(fmt...) udbg_printf(fmt) #else @@ -149,9 +151,11 @@ static inline void __tlbiel(unsigned long vpn, int psize, int apsize, int ssize) static inline void tlbie(unsigned long vpn, int psize, int apsize, int ssize, int local) { - unsigned int use_local = local && mmu_has_feature(MMU_FTR_TLBIEL); + unsigned int use_local; int lock_tlbie = !mmu_has_feature(MMU_FTR_LOCKLESS_TLBIE); + use_local = local && mmu_has_feature(MMU_FTR_TLBIEL) && !cxl_ctx_in_use(); + if (use_local) use_local = mmu_psize_defs[psize].tlbiel; if (lock_tlbie && !use_local)