From patchwork Fri Sep 5 10:45:00 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Priyanka Jain X-Patchwork-Id: 386298 X-Patchwork-Delegate: scottwood@freescale.com Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 1892F1400E4 for ; Fri, 5 Sep 2014 21:19:44 +1000 (EST) Received: from ozlabs.org (ozlabs.org [103.22.144.67]) by lists.ozlabs.org (Postfix) with ESMTP id E97461A1D91 for ; Fri, 5 Sep 2014 21:19:43 +1000 (EST) X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Received: from na01-bn1-obe.outbound.protection.outlook.com (mail-bn1bon0143.outbound.protection.outlook.com [157.56.111.143]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id C9ECA1A174A for ; Fri, 5 Sep 2014 21:19:07 +1000 (EST) Received: from BY2PR03CA042.namprd03.prod.outlook.com (10.141.249.15) by DM2PR03MB462.namprd03.prod.outlook.com (10.141.85.13) with Microsoft SMTP Server (TLS) id 15.0.1019.16; Fri, 5 Sep 2014 10:45:30 +0000 Received: from BL2FFO11FD039.protection.gbl (2a01:111:f400:7c09::177) by BY2PR03CA042.outlook.office365.com (2a01:111:e400:2c5d::15) with Microsoft SMTP Server (TLS) id 15.0.1019.16 via Frontend Transport; Fri, 5 Sep 2014 10:45:29 +0000 Received: from tx30smr01.am.freescale.net (192.88.168.50) by BL2FFO11FD039.mail.protection.outlook.com (10.173.161.135) with Microsoft SMTP Server (TLS) id 15.0.1010.11 via Frontend Transport; Fri, 5 Sep 2014 10:45:28 +0000 Received: from b32167-VirtualBox.ap.freescale.net (B32167-02.ap.freescale.net [10.232.132.32]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id s85AjLYI020555; Fri, 5 Sep 2014 03:45:25 -0700 From: Priyanka Jain To: , , Subject: [PATCH 2/2][v4] powerpc/fsl-booke: Add initial T1042RDB_PI board support Date: Fri, 5 Sep 2014 16:15:00 +0530 Message-ID: <1409913900-21638-1-git-send-email-Priyanka.Jain@freescale.com> X-Mailer: git-send-email 1.7.4.1 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.168.50; CTRY:US; IPV:CAL; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10019016)(6009001)(189002)(199003)(21056001)(68736004)(44976005)(62966002)(86362001)(87286001)(47776003)(50226001)(64706001)(85306004)(20776003)(50466002)(23676002)(4396001)(80022001)(50986999)(97736001)(83322001)(93916002)(83072002)(85852003)(6806004)(81542001)(89996001)(84676001)(2201001)(19580405001)(31966008)(74502001)(74662001)(92726001)(26826002)(87936001)(107046002)(81342001)(46102001)(102836001)(104166001)(106466001)(104016003)(92566001)(229853001)(88136002)(90102001)(19580395003)(99396002)(95666004)(105606002)(76482001)(79102001)(77982001)(77156001)(36756003)(2004002); DIR:OUT; SFP:1102; SCL:1; SRVR:DM2PR03MB462; H:tx30smr01.am.freescale.net; FPR:; MLV:ovrnspm; PTR:InfoDomainNonexistent; MX:1; A:1; LANG:en; X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;UriScan:; X-Forefront-PRVS: 0325F6C77B Received-SPF: Fail (protection.outlook.com: domain of freescale.com does not designate 192.88.168.50 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.168.50; helo=tx30smr01.am.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.168.50) smtp.mailfrom=Priyanka.Jain@freescale.com; X-OriginatorOrg: freescale.com Cc: Priyanka Jain , Poonam Aggrwal , Prabhakar Kushwaha X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" T1042RDB_PI is Freescale Reference Design Board supporting the T1042 QorIQ Power Architecture™ processor. T1042 is a reduced personality of T1040 SoC without Integrated 8-port Gigabit. The board is designed with low power features targeted for Printing Image Market. T1042RDB_PI is similar to T1040RDB board with few differences like it has video interface, supports T1042 personality only T1042RDB_PI board Overview ----------------------- - SERDES Connections, 8 lanes supporting: - PCI - SATA 2.0 - DDR Controller - Supports rates of up to 1600 MHz data-rate - Supports one DDR3LP UDIMM -IFC/Local Bus - NAND flash: 1GB 8-bit NAND flash - NOR: 128MB 16-bit NOR Flash - Ethernet - Two on-board RGMII 10/100/1G ethernet ports. - PHY #0 remains powered up during deep-sleep - CPLD - Clocks - System and DDR clock (SYSCLK, “DDRCLK”) - SERDES clocks - Power Supplies - USB - Supports two USB 2.0 ports with integrated PHYs - Two type A ports with 5V@1.5A per port. - SDHC - SDHC/SDXC connector - SPI - On-board 64MB SPI flash - I2C - Device connected: EEPROM, thermal monitor, VID controller, RTC - Other IO - Two Serial ports - ProfiBus port Add support for T1042RDB_PI board: -add device tree -Add entry in corenet_generic.c, as it is similar to other corenet platforms Signed-off-by: Poonam Aggrwal Signed-off-by: Prabhakar Kushwaha Signed-off-by: Priyanka Jain --- changes for v4: Updated cpld compatible string field changes for v3: Incorporated Scott comments on moving cpld compatible field to board specific file as cpld binaries are different changes for v2: Incorporated Scott comments on using common name for compatible string for cpld as register set is same arch/powerpc/boot/dts/t1042rdb_pi.dts | 57 +++++++++++++++++++++++++ arch/powerpc/platforms/85xx/corenet_generic.c | 1 + 2 files changed, 58 insertions(+), 0 deletions(-) create mode 100644 arch/powerpc/boot/dts/t1042rdb_pi.dts diff --git a/arch/powerpc/boot/dts/t1042rdb_pi.dts b/arch/powerpc/boot/dts/t1042rdb_pi.dts new file mode 100644 index 0000000..b9d0877 --- /dev/null +++ b/arch/powerpc/boot/dts/t1042rdb_pi.dts @@ -0,0 +1,57 @@ +/* + * T1042RDB_PI Device Tree Source + * + * Copyright 2014 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/include/ "fsl/t104xsi-pre.dtsi" +/include/ "t104xrdb.dtsi" + +/ { + model = "fsl,T1042RDB_PI"; + compatible = "fsl,T1042RDB_PI"; + ifc: localbus@ffe124000 { + cpld@3,0 { + compatible = "fsl,t1042rdb_pi-cpld"; + }; + }; + soc: soc@ffe000000 { + i2c@118000 { + rtc@68 { + compatible = "dallas,ds1337"; + reg = <0x68>; + interrupts = <0x2 0x1 0 0>; + }; + }; + }; +}; + +/include/ "fsl/t1042si-post.dtsi" diff --git a/arch/powerpc/platforms/85xx/corenet_generic.c b/arch/powerpc/platforms/85xx/corenet_generic.c index c268f89..100e80d 100644 --- a/arch/powerpc/platforms/85xx/corenet_generic.c +++ b/arch/powerpc/platforms/85xx/corenet_generic.c @@ -130,6 +130,7 @@ static const char * const boards[] __initconst = { "fsl,T1042QDS", "fsl,T1040RDB", "fsl,T1042RDB", + "fsl,T1042RDB_PI", "keymile,kmcoge4", NULL };